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Luke Kenneth Casson Leighton [Tue, 4 May 2021 12:34:33 +0000 (13:34 +0100)]
disable some of the extreme verbose debug printing
Luke Kenneth Casson Leighton [Sun, 2 May 2021 05:59:01 +0000 (06:59 +0100)]
add astor to setup.py dependencies
Luke Kenneth Casson Leighton [Sun, 2 May 2021 05:51:07 +0000 (06:51 +0100)]
change dependency name to libresoc-nmutil
Luke Kenneth Casson Leighton [Sat, 1 May 2021 15:18:33 +0000 (16:18 +0100)]
clean up MMU ROM test case
Luke Kenneth Casson Leighton [Fri, 30 Apr 2021 16:59:20 +0000 (17:59 +0100)]
add single regression test for bc_ctr in branch cases
Jacob Lifshay [Fri, 30 Apr 2021 02:01:44 +0000 (19:01 -0700)]
fix executable names
Luke Kenneth Casson Leighton [Mon, 26 Apr 2021 12:14:32 +0000 (13:14 +0100)]
add additional unit tests
Luke Kenneth Casson Leighton [Mon, 26 Apr 2021 11:37:16 +0000 (12:37 +0100)]
add cross-reference to gem5 power tests
Cesar Strauss [Sun, 25 Apr 2021 18:08:27 +0000 (15:08 -0300)]
Add a reentrant CR predication test case
Cesar Strauss [Sun, 25 Apr 2021 17:01:43 +0000 (14:01 -0300)]
Add test case for reentrant CR predication in ISACAller
This is derived from the intpred reentrant test.
It uses the new facility for easily setting individual CR bits.
Cesar Strauss [Sun, 25 Apr 2021 14:41:03 +0000 (11:41 -0300)]
Move creation of CR fields to its own class
This will ease setting and checking CR fields from test cases.
The old attribute names were kept as aliases, so it shouldn't have any
impact.
Cesar Strauss [Sun, 25 Apr 2021 14:18:29 +0000 (11:18 -0300)]
Improve debug information on mtcrf test case
Cesar Strauss [Sun, 25 Apr 2021 13:50:39 +0000 (10:50 -0300)]
Match CR size on ISACaller mtcrf test case
The underlying register for CR seems to be 64 bits for some reason. See:
https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/caller.py;h=
2f9dfa8746625f74fccaf9cd8a86f5503837009d;hb=HEAD#l495
Luke Kenneth Casson Leighton [Sat, 24 Apr 2021 15:35:28 +0000 (16:35 +0100)]
add missing __init__.py to get sphinxdoc working
Luke Kenneth Casson Leighton [Sat, 24 Apr 2021 15:06:56 +0000 (16:06 +0100)]
correct heading
Luke Kenneth Casson Leighton [Sat, 24 Apr 2021 15:04:58 +0000 (16:04 +0100)]
correct errors for sphinx doc build
Luke Kenneth Casson Leighton [Sat, 24 Apr 2021 14:59:18 +0000 (15:59 +0100)]
add sphinx doc config
Luke Kenneth Casson Leighton [Sat, 24 Apr 2021 03:31:02 +0000 (04:31 +0100)]
add ply and pygdbmi dependencies
Luke Kenneth Casson Leighton [Sat, 24 Apr 2021 03:24:20 +0000 (04:24 +0100)]
update version 0.0.1
Luke Kenneth Casson Leighton [Sat, 24 Apr 2021 03:08:00 +0000 (04:08 +0100)]
update news
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 19:54:56 +0000 (20:54 +0100)]
update README
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 19:27:20 +0000 (20:27 +0100)]
add logical test cases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 19:23:24 +0000 (20:23 +0100)]
add TRAP test cases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 19:06:30 +0000 (20:06 +0100)]
add spr tests
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:53:57 +0000 (19:53 +0100)]
add branch test cases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:48:29 +0000 (19:48 +0100)]
add LDST test cases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:42:15 +0000 (19:42 +0100)]
add mul test cases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:37:43 +0000 (19:37 +0100)]
add div test cases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:18:06 +0000 (19:18 +0100)]
add mmu test
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:13:27 +0000 (19:13 +0100)]
add CR test cases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:09:16 +0000 (19:09 +0100)]
update install comments
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:06:04 +0000 (19:06 +0100)]
update README
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:05:16 +0000 (19:05 +0100)]
update README
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:03:45 +0000 (19:03 +0100)]
update README
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 18:01:05 +0000 (19:01 +0100)]
choose alternative name of pypi package
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 17:55:50 +0000 (18:55 +0100)]
add ShiftRotTestCases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 16:47:24 +0000 (17:47 +0100)]
add a MASK32 function which offsets by 32 on the inputs
also fix ROTL32 so it selects value from its input
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 16:43:42 +0000 (17:43 +0100)]
use MASK32 function in fixedshift
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 16:17:26 +0000 (17:17 +0100)]
whoops missed comma in setup.py console_scripts
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 16:10:21 +0000 (17:10 +0100)]
move mask_extend function to utils
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 16:07:59 +0000 (17:07 +0100)]
move ALUHelpers to openpower-isa
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 16:02:52 +0000 (17:02 +0100)]
use spr_to_fast from this repo
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 16:01:56 +0000 (17:01 +0100)]
add util.py
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 15:59:17 +0000 (16:59 +0100)]
rename soc use openpower consts regfile enums
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 15:54:41 +0000 (16:54 +0100)]
move Regfile enums here
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 15:52:41 +0000 (16:52 +0100)]
move Regfile enums here
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 15:46:39 +0000 (16:46 +0100)]
make svanalysis a python console script
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 15:44:47 +0000 (16:44 +0100)]
sort out sv_analysys.py moving to openpower-isa
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 15:28:28 +0000 (16:28 +0100)]
remove unneeded imports in sim test cases
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 15:19:31 +0000 (16:19 +0100)]
whoops, now using SPRfull
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 14:43:01 +0000 (15:43 +0100)]
more migration to openpower-isa
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 14:26:37 +0000 (15:26 +0100)]
comments on soc imports
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 14:13:58 +0000 (15:13 +0100)]
resolving imports changing over
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 13:26:01 +0000 (14:26 +0100)]
sort out imports created by pywriter
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 13:25:40 +0000 (14:25 +0100)]
sort out imports created by pywriter
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 13:19:12 +0000 (14:19 +0100)]
sorting out wiki directories
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 13:04:52 +0000 (14:04 +0100)]
resolve new path for openpower/isa markdown
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 13:04:34 +0000 (14:04 +0100)]
should not have been added
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:54:20 +0000 (13:54 +0100)]
add Makefile
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:49:09 +0000 (13:49 +0100)]
add qemuopts
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:47:34 +0000 (13:47 +0100)]
add memmap
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:47:03 +0000 (13:47 +0100)]
add .gitignore
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:46:38 +0000 (13:46 +0100)]
ignore pycache
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:45:59 +0000 (13:45 +0100)]
add exceptions
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:38:17 +0000 (13:38 +0100)]
add SV records
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:36:25 +0000 (13:36 +0100)]
add .gitignores
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:35:58 +0000 (13:35 +0100)]
add pseudo and isa
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:32:36 +0000 (13:32 +0100)]
add qemu_test
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:30:46 +0000 (13:30 +0100)]
add decoder proofs
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:30:31 +0000 (13:30 +0100)]
add decoder unit tests
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:29:28 +0000 (13:29 +0100)]
move consts from soc
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:27:05 +0000 (13:27 +0100)]
add nmutil to setup.py commented out
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:21:51 +0000 (13:21 +0100)]
add debug prints
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:02:33 +0000 (13:02 +0100)]
add LGPLv3 license
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 12:01:23 +0000 (13:01 +0100)]
add first openpower decoder files, copied from soc/decoder
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 11:43:53 +0000 (12:43 +0100)]
add news, README, and setup.py
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 10:02:24 +0000 (11:02 +0100)]
test commit
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 10:01:05 +0000 (11:01 +0100)]
test commit
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:55:04 +0000 (10:55 +0100)]
test commit
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:52:15 +0000 (10:52 +0100)]
test commit
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:50:53 +0000 (10:50 +0100)]
add link to decode1.vhdl
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:45:13 +0000 (10:45 +0100)]
add explanatory README.txt
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:42:51 +0000 (10:42 +0100)]
add explanatory README.txt
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:20:13 +0000 (10:20 +0100)]
add sv_analysis program
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:19:13 +0000 (10:19 +0100)]
add markdown files extracted manually from v3.0B spec
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:18:17 +0000 (10:18 +0100)]
add isatables extracted from microwatt and v3.0B spec
Luke Kenneth Casson Leighton [Fri, 23 Apr 2021 09:13:54 +0000 (10:13 +0100)]
first commit
projects / openpower-isa.git / log