mesa.git
7 years agomesa: pass ctx to add_uniform_to_shader constructor
Timothy Arceri [Tue, 22 Aug 2017 10:31:57 +0000 (20:31 +1000)]
mesa: pass ctx to add_uniform_to_shader constructor

Fixes: 4c2422067b5c ("glsl: pass UseSTD430AsDefaultPacking to where it will be used")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agoegl: deduplicate allocations of local buffer over each platform backend (v2)
Gwan-gyeong Mun [Fri, 4 Aug 2017 15:16:11 +0000 (00:16 +0900)]
egl: deduplicate allocations of local buffer over each platform backend (v2)

platform_drm, platform_wayland and platform_android have similiar local buffer
allocation routines. For deduplicating, it unifies dri2_egl_surface's
local buffer allocation routines. And it polishes inconsistent indentations.

Note that as dri2_wl_get_buffers_with_format() have not make a __DRI_BUFFER_BACK_LEFT
attachment buffer for local_buffers, new helper function, dri2_egl_surface_free_local_buffers(),
will drop the __DRI_BUFFER_BACK_LEFT check.
So if other platforms use new helper functions, we have to ensure not to make
__DRI_BUFFER_BACK_LEFT attachment buffer for local_buffers.

v2: Fixes from Emil's review:
   a) Make local_buffers variable, dri2_egl_surface_alloc_local_buffer() and
      dri2_egl_surface_free_local_buffers() unconditionally.
   b) Preserve the original codeflow for error_path and normal_path.
   c) Add note on commit messages for dropping of __DRI_BUFFER_BACK_LEFT check.
   c) Rollback the unrelated whitespace changes.
   d) Add a missing blank line.

Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
7 years agomesa: only expose EXT_memory_object functions if the ext is supported
Samuel Pitoiset [Mon, 21 Aug 2017 20:22:29 +0000 (22:22 +0200)]
mesa: only expose EXT_memory_object functions if the ext is supported

They should not be exposed when the extension is unsupported.
Note that ARB_direct_state_access is always exposed and
EXT_semaphore is not supported at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: only expose glImportMemoryFdEXT if the ext is supported
Samuel Pitoiset [Mon, 21 Aug 2017 20:22:28 +0000 (22:22 +0200)]
mesa: only expose glImportMemoryFdEXT if the ext is supported

From the EXT_external_objects_fd spec:

   "If the GL_EXT_memory_object_fd string is reported, the following
    commands are added:

    void ImportMemoryFdEXT(uint memory,
                           uint64 size,
                           enum handleType,
                           int fd);"

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: try to re-use previously deleted bindless descriptor slots
Samuel Pitoiset [Tue, 4 Jul 2017 10:37:32 +0000 (12:37 +0200)]
radeonsi: try to re-use previously deleted bindless descriptor slots

Currently, when the array is full it is resized but it can grow
over and over because we don't try to re-use descriptor slots.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: use slot indexes for bindless handles
Samuel Pitoiset [Mon, 3 Jul 2017 14:06:44 +0000 (16:06 +0200)]
radeonsi: use slot indexes for bindless handles

Using VRAM address as bindless handles is not a good idea because
we have to use LLVMIntToPTr and the LLVM CSE pass can't optimize
because it has no information about the pointer.

Instead, use slots indexes like the existing descriptors. Note
that we use fixed 16-dword slots for both samplers and images.
This doesn't really matter because no real apps use image handles.

This improves performance with DOW3 by +7%.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: add si_emit_global_shader_pointers() helper
Samuel Pitoiset [Wed, 28 Jun 2017 16:19:09 +0000 (18:19 +0200)]
radeonsi: add si_emit_global_shader_pointers() helper

To share common code between rw buffers and bindless descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: only initialize dirty_mask when CE is used
Samuel Pitoiset [Wed, 28 Jun 2017 16:48:14 +0000 (18:48 +0200)]
radeonsi: only initialize dirty_mask when CE is used

Looks like it's useless to initialize that field when CE is
unused. This will also allow to declare more than 64 elements
for the array of bindless descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: make some si_descriptors fields 32-bit
Samuel Pitoiset [Wed, 28 Jun 2017 16:46:31 +0000 (18:46 +0200)]
radeonsi: make some si_descriptors fields 32-bit

The number of bindless descriptors is dynamic and we definitely
have to support more than 256 slots.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: declare new user SGPR indices for bindless samplers/images
Samuel Pitoiset [Wed, 28 Jun 2017 16:11:48 +0000 (18:11 +0200)]
radeonsi: declare new user SGPR indices for bindless samplers/images

A new pair of user SGPR is needed for loading the bindless
descriptors from shaders. Because the descriptors are global for
all stages, there is no need to add separate indices for GFX9.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium/util: add new module that allocate "numbers"
Samuel Pitoiset [Tue, 8 Aug 2017 14:15:34 +0000 (16:15 +0200)]
gallium/util: add new module that allocate "numbers"

Will be used for allocating bindless descriptor slots for
RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi/gfx9: add performance counters
Nicolai Hähnle [Thu, 10 Aug 2017 23:28:40 +0000 (01:28 +0200)]
radeonsi/gfx9: add performance counters

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: extract common code of si_upload_{graphics,compute}_shader_descriptors
Nicolai Hähnle [Thu, 10 Aug 2017 20:44:06 +0000 (22:44 +0200)]
radeonsi: extract common code of si_upload_{graphics,compute}_shader_descriptors

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium: remove unused PIPE_DUMP_* defines
Nicolai Hähnle [Mon, 7 Aug 2017 09:05:20 +0000 (11:05 +0200)]
gallium: remove unused PIPE_DUMP_* defines

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoddebug: remove dd_draw_record::driver_state_log
Nicolai Hähnle [Mon, 7 Aug 2017 09:02:33 +0000 (11:02 +0200)]
ddebug: remove dd_draw_record::driver_state_log

It is no longer used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: emit string markers to log context
Nicolai Hähnle [Tue, 15 Aug 2017 13:45:49 +0000 (15:45 +0200)]
radeonsi: emit string markers to log context

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: log decompress blits
Nicolai Hähnle [Tue, 15 Aug 2017 15:11:31 +0000 (17:11 +0200)]
radeonsi: log decompress blits

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: log draw and compute state into log context
Nicolai Hähnle [Fri, 4 Aug 2017 17:35:30 +0000 (19:35 +0200)]
radeonsi: log draw and compute state into log context

Also add missing trace emits and CS logging for compute launches.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: print saved CS to the log context
Nicolai Hähnle [Fri, 4 Aug 2017 16:24:33 +0000 (18:24 +0200)]
radeonsi: print saved CS to the log context

Use the auto logger facility, so that CS chunks will be interleaved
with other log info.

v2:
- fix some crashes when not using CE
- fix skipping "previous" chunks of current (unflushed) IB
- fix error handling in si_begin_cs_debug

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: start using u_log_context for debugging
Nicolai Hähnle [Fri, 4 Aug 2017 14:50:05 +0000 (16:50 +0200)]
radeonsi: start using u_log_context for debugging

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: re-order debug state dumping
Nicolai Hähnle [Fri, 4 Aug 2017 13:42:15 +0000 (15:42 +0200)]
radeonsi: re-order debug state dumping

Keep together the parts that won't use the deferred logging mechanism.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: make si_shader_selector_reference globally visible
Nicolai Hähnle [Fri, 4 Aug 2017 14:48:30 +0000 (16:48 +0200)]
radeonsi: make si_shader_selector_reference globally visible

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: add reference count to si_compute
Nicolai Hähnle [Fri, 4 Aug 2017 14:47:48 +0000 (16:47 +0200)]
radeonsi: add reference count to si_compute

To allow keep-alive for deferred logging.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: implement pipe_context::set_log_context
Nicolai Hähnle [Fri, 4 Aug 2017 13:54:56 +0000 (15:54 +0200)]
radeonsi: implement pipe_context::set_log_context

We'll add radeonsi-specific code to set_log_context in later patches,
but we may want to log from common code. Hence keep the log pointer
in r600_common_context.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoamd/common: split out ac_parse_ib_chunk from ac_parse_ib
Nicolai Hähnle [Fri, 4 Aug 2017 16:55:39 +0000 (18:55 +0200)]
amd/common: split out ac_parse_ib_chunk from ac_parse_ib

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoddebug: add driver log to record dumps
Nicolai Hähnle [Fri, 4 Aug 2017 15:42:16 +0000 (17:42 +0200)]
ddebug: add driver log to record dumps

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium: add pipe_context::set_log_context
Nicolai Hähnle [Fri, 4 Aug 2017 13:54:41 +0000 (15:54 +0200)]
gallium: add pipe_context::set_log_context

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoutil/log: add auto logger facility
Nicolai Hähnle [Tue, 15 Aug 2017 13:15:47 +0000 (15:15 +0200)]
util/log: add auto logger facility

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoutil: add chunk logging module
Nicolai Hähnle [Fri, 4 Aug 2017 13:31:46 +0000 (15:31 +0200)]
util: add chunk logging module

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoglsl/linker: Make several functions not static
Ian Romanick [Tue, 22 Aug 2017 01:57:07 +0000 (18:57 -0700)]
glsl/linker: Make several functions not static

copy_constant_to_storage, set_uniform_initializer,
populate_consumer_input_sets, and get_matching_input are all used by
tests in src/compiler/glsl/tests:

glsl/tests/varyings_test.o: In function `link_varyings_single_simple_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:131: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_gl_ClipDistance_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:159: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_gl_CullDistance_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:186: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_single_interface_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:208: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_one_interface_and_one_simple_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:241: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o:src/compiler/glsl/tests/varyings_test.cpp:272: more undefined references to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)' follow
glsl/tests/varyings_test.o: In function `link_varyings_interface_field_doesnt_match_noninterface_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:289: undefined reference to `linker::get_matching_input(void*, ir_variable const*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_interface_field_doesnt_match_noninterface_vice_versa_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:314: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
src/compiler/glsl/tests/varyings_test.cpp:328: undefined reference to `linker::get_matching_input(void*, ir_variable const*, hash_table*, hash_table*, ir_variable**)'

Fixes: ca73c3358c91 ("glsl: Mark functions static")
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
7 years agoi965/clear: Quantize the depth clear value based on the format
Jason Ekstrand [Sun, 20 Aug 2017 03:31:03 +0000 (20:31 -0700)]
i965/clear: Quantize the depth clear value based on the format

In f9fd976e8adba733b08d we changed the clear value to be stored as an
isl_color_value.  This had the side-effect same clear value check is now
happening directly between the f32[0] field of the isl_color_value and
ctx->Depth.Clear.  This isn't what we want for two reasons.  One is that
the comparison happens in floating point even for Z16 and Z24 formats.
Worse than that, ctx->Depth.Clear is a double so, even for 32-bit float
formats, we were comparing as doubles and not floats.  This means that
the test basically always fails for anything other than 0.0f and 1.0f.
This caused a slight performance regression in Lightsmark 2008 because
it was using a depth clear value of 0.999 which can't be stored in a
32-bit float so we were doing unneeded resolves.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/101678
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
7 years agomesa/st: simplify some UBO index logic
Timothy Arceri [Thu, 17 Aug 2017 11:03:03 +0000 (21:03 +1000)]
mesa/st: simplify some UBO index logic

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoi965: enable STD430 packing by default on IVB+
Timothy Arceri [Mon, 24 Jul 2017 02:37:07 +0000 (12:37 +1000)]
i965: enable STD430 packing by default on IVB+

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoglsl: pass UseSTD430AsDefaultPacking to where it will be used
Timothy Arceri [Mon, 24 Jul 2017 00:24:53 +0000 (10:24 +1000)]
glsl: pass UseSTD430AsDefaultPacking to where it will be used

Here we also make use of the UseSTD430AsDefaultPacking constant
and call the new get_internal_ifc_packing() helper.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoglsl: add get_internal_ifc_packing() type helper
Timothy Arceri [Mon, 24 Jul 2017 00:11:04 +0000 (10:11 +1000)]
glsl: add get_internal_ifc_packing() type helper

This is used to avoid code duplication when selecting the
packing type for shared and packed layouts.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: add UseSTD430AsDefaultPacking constant
Timothy Arceri [Sun, 23 Jul 2017 01:26:55 +0000 (11:26 +1000)]
mesa: add UseSTD430AsDefaultPacking constant

This will be used to enable the STD430 layout as the default for
UBOs and SSBOs with layouts of shared/packed rather than STD140.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoclover/device: Calculate CL_DEVICE_MEM_BASE_ADDR_ALIGN in device
Aaron Watry [Thu, 17 Aug 2017 01:44:41 +0000 (20:44 -0500)]
clover/device: Calculate CL_DEVICE_MEM_BASE_ADDR_ALIGN in device

The CL CTS queries CL_DEVICE_MEM_BASE_ADDR_ALIGN for a device and
then allocates user pointers aligned to that value for its tests.

The minimum value is defined as:
  the size (in bits) of the largest OpenCL built-in data type supported
  by the device (long16 in FULL profile, long16 or int16 in EMBEDDED
  profile) for devices that are not of type CL_DEVICE_TYPE_CUSTOM.

At the moment, all known devices that support user pointers require
CPU page alignment for buffers created from user pointers, so just
query that from sysconf.

v3: Use std::max instead of MAX2 (Francisco)
    Add missing unistd include
v2: Use system page size instead of a new pipe cap

Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by (v2): Jan Vesely <jan.vesely@rutgers.edu>

7 years agomesa: optimize _mesa_attr_zero_aliases_vertex()
Brian Paul [Fri, 18 Aug 2017 21:48:13 +0000 (15:48 -0600)]
mesa: optimize _mesa_attr_zero_aliases_vertex()

After the context is initialized, the API and context flags won't
change.  So, we can compute whether vertex attribute 0 aliases
vertex position just once.

This should make the glVertexAttrib*() functions a little quicker.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agovbo: use new _is_vertex_position() helper in vbo_attrib_tmp.h
Brian Paul [Fri, 18 Aug 2017 20:15:57 +0000 (14:15 -0600)]
vbo: use new _is_vertex_position() helper in vbo_attrib_tmp.h

Makes the code a bit more understandable.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agovbo: make vbo_bind_arrays() static
Brian Paul [Sat, 19 Aug 2017 03:17:14 +0000 (21:17 -0600)]
vbo: make vbo_bind_arrays() static

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agosvga: replace gotos with conditionals in array drawing code
Brian Paul [Sat, 19 Aug 2017 03:18:47 +0000 (21:18 -0600)]
svga: replace gotos with conditionals in array drawing code

No Piglit regressions.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agollvmpipe: add some whitespace between functions in lp_texture.c
Brian Paul [Fri, 18 Aug 2017 18:06:09 +0000 (12:06 -0600)]
llvmpipe: add some whitespace between functions in lp_texture.c

Trivial.

7 years agomesa: formatting clean-up in syncobj.c
Brian Paul [Fri, 18 Aug 2017 15:50:40 +0000 (09:50 -0600)]
mesa: formatting clean-up in syncobj.c

Line wrap to 78 columns, etc.  Trivial.

7 years agosvga: whitespace clean-up in svga_draw_private.h
Brian Paul [Fri, 18 Aug 2017 15:50:07 +0000 (09:50 -0600)]
svga: whitespace clean-up in svga_draw_private.h

Trivial.

7 years agodocs: remove link to MissingFunctionality wiki page
Timothy Arceri [Mon, 21 Aug 2017 01:29:05 +0000 (11:29 +1000)]
docs: remove link to MissingFunctionality wiki page

Outdated, features.txt is used instead.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agodocs: remove MSVC testing/building from help wanted
Timothy Arceri [Mon, 21 Aug 2017 01:44:42 +0000 (11:44 +1000)]
docs: remove MSVC testing/building from help wanted

We are using appveyor for Windows continuous integration.

https://ci.appveyor.com/project/mesa3d/mesa

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agodocs: remove automatic testing from help wanted
Timothy Arceri [Mon, 21 Aug 2017 01:41:19 +0000 (11:41 +1000)]
docs: remove automatic testing from help wanted

Intel has a Jenkins setup and has made the various scripts and
documentation open source.

https://github.com/janesma/mesa_jenkins

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agodocs: rename TODOs to Legacy Driver TODOs
Timothy Arceri [Mon, 21 Aug 2017 01:39:33 +0000 (11:39 +1000)]
docs: rename TODOs to Legacy Driver TODOs

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agodocs: remove link to i915g TODOs
Timothy Arceri [Mon, 21 Aug 2017 01:35:22 +0000 (11:35 +1000)]
docs: remove link to i915g TODOs

This is an unoffical unmaintained driver, we don't really want
people wasting effort trying to improve it.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agodocs: remove link to radeonsi TODO wiki page
Timothy Arceri [Mon, 21 Aug 2017 01:30:33 +0000 (11:30 +1000)]
docs: remove link to radeonsi TODO wiki page

This page is deprecated.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agogallium/docs: remove old llvmpipe TODO
Timothy Arceri [Mon, 21 Aug 2017 01:25:18 +0000 (11:25 +1000)]
gallium/docs: remove old llvmpipe TODO

Features are already covered by features.txt like all the other
drivers.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agomesa: fix ES only draw if we have vertex positions
Timothy Arceri [Mon, 21 Aug 2017 00:42:21 +0000 (10:42 +1000)]
mesa: fix ES only draw if we have vertex positions

This code was separated from the validation code so it could
use used with KHR_no_error paths. The return values were inverted
to reflect the name of the helper, but here the condtion was
mistakenly inverted rather than the return value.

Fixes: 4df2931a87fe (mesa/vbo: move some Draw checks out of validation)
Reported-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoglsl: Add prototype for udivmod64()
Matt Turner [Sun, 9 Jul 2017 21:12:52 +0000 (14:12 -0700)]
glsl: Add prototype for udivmod64()

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agoglsl: Mark functions static
Matt Turner [Sun, 9 Jul 2017 21:12:31 +0000 (14:12 -0700)]
glsl: Mark functions static

Cuts 3224 bytes of .text

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agoi965: Mark functions static
Matt Turner [Sun, 9 Jul 2017 21:11:02 +0000 (14:11 -0700)]
i965: Mark functions static

Cuts 300 bytes of .text

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agoi965/vec4: Use 'class' src_reg, rather than 'struct' src_reg
Matt Turner [Fri, 7 Jul 2017 01:46:43 +0000 (18:46 -0700)]
i965/vec4: Use 'class' src_reg, rather than 'struct' src_reg

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agoi965/vec4: Return float from spill_cost_for_type()
Matt Turner [Fri, 7 Jul 2017 00:33:20 +0000 (17:33 -0700)]
i965/vec4: Return float from spill_cost_for_type()

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
7 years agoanv: Move clamp_int64() inside the IVB check
Matt Turner [Fri, 7 Jul 2017 04:20:15 +0000 (21:20 -0700)]
anv: Move clamp_int64() inside the IVB check

It's only used in the gen7_cmd_buffer_emit_scissor() function.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agoglsl: Remove unused private fields
Matt Turner [Fri, 7 Jul 2017 01:45:14 +0000 (18:45 -0700)]
glsl: Remove unused private fields

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agomesa: Don't compare unsigned for < 0
Matt Turner [Fri, 7 Jul 2017 01:48:03 +0000 (18:48 -0700)]
mesa: Don't compare unsigned for < 0

The INTEL_performance_query spec says

   "Performance counter id 0 is reserved as an invalid counter."

GLuint counterid_to_index(GLuint counterid) just returns counterid - 1,
so with unsigned overflow rules, it will generate 0xFFFFFFFF given an
input of 0. 0xFFFFFFFF will trigger the counterIndex >= queryNumCounters
check, so the code worked as is. It just contained a useless comparison.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agoegl: Fix inclusion of egl.h+mesa_glinterop.h
Matt Turner [Fri, 7 Jul 2017 01:40:53 +0000 (18:40 -0700)]
egl: Fix inclusion of egl.h+mesa_glinterop.h

Previously clang would warn about redefinition of typedef EGLDisplay. Avoid
this by adding preprocessor guards to mesa_glinterop.h and including it
after EGL.h is indirectly included.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agoradeonsi: don't prefetch VBO descriptors if vertex elements == NULL
Marek Olšák [Thu, 17 Aug 2017 14:59:31 +0000 (16:59 +0200)]
radeonsi: don't prefetch VBO descriptors if vertex elements == NULL

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agor600g: don't set up and don't call the fetch shader if there are no VS inputs
Marek Olšák [Sat, 19 Aug 2017 16:33:02 +0000 (18:33 +0200)]
r600g: don't set up and don't call the fetch shader if there are no VS inputs

7 years agoi965: Optimize reading the destination type
Matt Turner [Thu, 3 Aug 2017 06:20:00 +0000 (23:20 -0700)]
i965: Optimize reading the destination type

brw_hw_type_to_reg_type() needs to know only whether the file is
BRW_IMMEDIATE_VALUE or not, which is not a valid file for the
destination. gcc and clang will evaluate __builtin_strcmp() at compile
time, so we can use it to pass a constant file for the destination.

   text    data     bss     dec     hex filename
7816214  346248  420496 8582958  82f72e i965_dri.so before
7816070  346248  420496 8582814  82f69e i965_dri.so after

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Mark brw_hw_type_to_reg_type() as a pure function
Matt Turner [Thu, 3 Aug 2017 06:20:39 +0000 (23:20 -0700)]
i965: Mark brw_hw_type_to_reg_type() as a pure function

   text    data     bss     dec     hex filename
7816886  346248  420496 8583630  82f9ce i965_dri.so before
7816214  346248  420496 8582958  82f72e i965_dri.so after

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Hide the register type hardware encodings
Matt Turner [Thu, 27 Jul 2017 04:13:03 +0000 (21:13 -0700)]
i965: Hide the register type hardware encodings

So we stop mixing them with the logical enum.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Stop using hardware register types directly
Matt Turner [Thu, 27 Jul 2017 04:08:20 +0000 (21:08 -0700)]
i965: Stop using hardware register types directly

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Add brw_hw_reg_type_to_letters() and use it in brw_disasm.c
Matt Turner [Wed, 2 Aug 2017 20:41:32 +0000 (13:41 -0700)]
i965: Add brw_hw_reg_type_to_letters() and use it in brw_disasm.c

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Move brw_reg_type_letters() as well
Matt Turner [Thu, 27 Jul 2017 00:31:36 +0000 (17:31 -0700)]
i965: Move brw_reg_type_letters() as well

And add "to_" to the name for consistency with the other functions in
this file.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Switch to using the logical register types
Matt Turner [Thu, 27 Jul 2017 00:59:10 +0000 (17:59 -0700)]
i965: Switch to using the logical register types

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Add functions to abstract access to register types
Matt Turner [Wed, 26 Jul 2017 23:51:58 +0000 (16:51 -0700)]
i965: Add functions to abstract access to register types

Previously the brw_inst{,_set}_{dst,src0,src1}_reg_type() functions
provided access to the hardware encodings for the register types. We
often mixed these with the logical BRW_REGISTER_TYPE_* enums (which
themselves used to be the hardware format!) with bad results.

With that functionality now available with the hw_ versions (see
previous commit), we now add functions that take the logical
BRW_REGISTER_TYPE_* enums and convert into the hardware format and vice
versa. To do the conversion we also have to provide the file.

Note the asymmetry between the two functions: the new getter reads the
file from the instruction word, and to ensure that is always set the
setter writes both the file and the type.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Rename brw_inst's functions that access the register type
Matt Turner [Wed, 26 Jul 2017 21:25:54 +0000 (14:25 -0700)]
i965: Rename brw_inst's functions that access the register type

Put hw_ in the name so that it's clear these are the hardware encodings.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Index brw_hw_reg_type_to_size()'s table by logical type
Matt Turner [Wed, 26 Jul 2017 23:56:10 +0000 (16:56 -0700)]
i965: Index brw_hw_reg_type_to_size()'s table by logical type

I'll be transitioning everything to use the logical types.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Add a brw_hw_type_to_reg_type() function
Matt Turner [Thu, 27 Jul 2017 00:50:22 +0000 (17:50 -0700)]
i965: Add a brw_hw_type_to_reg_type() function

Will be used in later commits.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Use a common table to translate logical to hardware types
Matt Turner [Thu, 27 Jul 2017 00:50:05 +0000 (17:50 -0700)]
i965: Use a common table to translate logical to hardware types

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Extract functions dealing with register types to separate file
Matt Turner [Wed, 26 Jul 2017 18:08:11 +0000 (11:08 -0700)]
i965: Extract functions dealing with register types to separate file

I'm going to encapsulate all of the logic dealing with register types in
this file.

Rename the parameters for the hardware encodings from type -> hw_type at
the same time.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Reverse file/type arguments to register type functions
Matt Turner [Thu, 27 Jul 2017 00:03:12 +0000 (17:03 -0700)]
i965: Reverse file/type arguments to register type functions

I think of the initial arguments as "state" and the last as the actual
subject.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Add support for disassembling 64-bit integer immediates
Matt Turner [Tue, 25 Jul 2017 21:25:27 +0000 (14:25 -0700)]
i965: Add support for disassembling 64-bit integer immediates

After the last patch converted things into enums, I helpfully got a
compiler warning about these missing from the switch statement.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Use separate enums for register vs immediate types
Matt Turner [Tue, 25 Jul 2017 21:05:44 +0000 (14:05 -0700)]
i965: Use separate enums for register vs immediate types

The hardware encodings often mean different things depending on whether
the source is an immediate.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Reorder brw_reg_type enum values
Matt Turner [Tue, 25 Jul 2017 20:16:25 +0000 (13:16 -0700)]
i965: Reorder brw_reg_type enum values

These vaguely corresponded to the hardware encodings, but that is purely
historical at this point. Reorder them so we stop making things "almost
work" when mixing enums.

The ordering has been closen so that no enum value is the same as a
compatible hardware encoding.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Validate destination restrictions with vector immediates
Matt Turner [Fri, 28 Jul 2017 01:29:50 +0000 (18:29 -0700)]
i965: Validate destination restrictions with vector immediates

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Don't let raw-move check be tricked by immediate vector types
Matt Turner [Tue, 1 Aug 2017 19:21:54 +0000 (12:21 -0700)]
i965: Don't let raw-move check be tricked by immediate vector types

UB and B type encodings are the same as UV and VF. Noticed when writing
the following patch.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Only change type of 0.0f to VF if destination stride == 1
Matt Turner [Tue, 1 Aug 2017 17:12:56 +0000 (10:12 -0700)]
i965: Only change type of 0.0f to VF if destination stride == 1

The destination stride must be equivalent to a dword if VF is used.

Also, since the only compaction table entires with "i:vf" have the
destination as "r:f" specifically check that the destination is of type
float.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Remove CONT/BREAK from instruction compaction test
Matt Turner [Tue, 1 Aug 2017 02:13:15 +0000 (19:13 -0700)]
i965: Remove CONT/BREAK from instruction compaction test

These cannot be compacted. A similar mistake was fixed in commit
90eaf01616a8

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Test instruction compaction on all supported Gens
Matt Turner [Tue, 1 Aug 2017 02:07:42 +0000 (19:07 -0700)]
i965: Test instruction compaction on all supported Gens

Note that there's no point in testing on G45, since its compaction is
the same as Gen5. Same logic applies to Gen7 variants and low-power
parts.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Silence signed/unsigned comparison warning
Matt Turner [Wed, 2 Aug 2017 23:17:05 +0000 (16:17 -0700)]
i965: Silence signed/unsigned comparison warning

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Move compaction "prepass" into brw_eu_compact.c
Matt Turner [Fri, 28 Jul 2017 01:30:14 +0000 (18:30 -0700)]
i965: Move compaction "prepass" into brw_eu_compact.c

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoi965: Mark src inst pointer const in compaction code
Matt Turner [Mon, 31 Jul 2017 22:35:49 +0000 (15:35 -0700)]
i965: Mark src inst pointer const in compaction code

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agovulkan: import 1.0.59 headers and xml.
Dave Airlie [Mon, 21 Aug 2017 20:59:07 +0000 (06:59 +1000)]
vulkan: import 1.0.59 headers and xml.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoAndroid: Fix LLVM duplicated symbols linking for N and M
Rob Herring [Tue, 15 Aug 2017 21:37:41 +0000 (16:37 -0500)]
Android: Fix LLVM duplicated symbols linking for N and M

Both statically linking libLLVMCore and dynamically linking libLLVM causes
duplicated symbols in gallium_dri.so and it fails to dlopen. We don't
really need to link libLLVMCore, but just need generated headers to be
built first. Dynamically linking to libLLVM instead is enough to do
that. Thanks to Qiang Yu for finding the root cause.

With this change, we can align all versions and just have libLLVM as a
shared lib dependency.

This also requires changes in the M and N versions of LLVM to export the
include paths for libLLVM. AOSP master is okay.

Fixes: 26aee6f4d5a ("Android: rework LLVM build support")
Reported-by: Mauro Rossi <issor.oruam@gmail.com>
Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Signed-off-by: Rob Herring <robh@kernel.org>
7 years agodocs: update calendar, add news item and link release notes for 17.1.7
Andres Gomez [Mon, 21 Aug 2017 15:34:42 +0000 (18:34 +0300)]
docs: update calendar, add news item and link release notes for 17.1.7

Signed-off-by: Andres Gomez <agomez@igalia.com>
7 years agodocs: add sha256 checksums for 17.1.7
Andres Gomez [Mon, 21 Aug 2017 15:22:49 +0000 (18:22 +0300)]
docs: add sha256 checksums for 17.1.7

Signed-off-by: Andres Gomez <agomez@igalia.com>
7 years agodocs: add release notes for 17.1.7
Andres Gomez [Mon, 21 Aug 2017 15:10:18 +0000 (18:10 +0300)]
docs: add release notes for 17.1.7

Signed-off-by: Andres Gomez <agomez@igalia.com>
7 years agost/va: add MJPEG for config
Leo Liu [Tue, 15 Aug 2017 15:44:08 +0000 (11:44 -0400)]
st/va: add MJPEG for config

To enable MJPEG HW decode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agost/va: reallocate surface with YUYV stream
Leo Liu [Tue, 15 Aug 2017 16:33:21 +0000 (12:33 -0400)]
st/va: reallocate surface with YUYV stream

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agost/va: detect MJPEG format from bitstream
Leo Liu [Tue, 15 Aug 2017 18:08:02 +0000 (14:08 -0400)]
st/va: detect MJPEG format from bitstream

To find if the format is supported YUYV by sampling factor which
is embedded from bitstream. So we could use this info for buffer
reallocation on the correct format.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/uvd: add YUYV format support for target buffer
Leo Liu [Fri, 18 Aug 2017 16:12:05 +0000 (12:12 -0400)]
radeon/uvd: add YUYV format support for target buffer

Make chroma plane optional for YUYV support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agost/va: reallocate surface when interlaced
Leo Liu [Tue, 15 Aug 2017 16:58:59 +0000 (12:58 -0400)]
st/va: reallocate surface when interlaced

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/video: MJPEG not support stacked video buffers
Leo Liu [Tue, 15 Aug 2017 16:39:35 +0000 (12:39 -0400)]
radeon/video: MJPEG not support stacked video buffers

So we have to detect it for reallocation of de-interlaced buffers

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agost/va: make surface allocate functions more usefully
Leo Liu [Tue, 15 Aug 2017 13:07:06 +0000 (09:07 -0400)]
st/va: make surface allocate functions more usefully

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>