Rob Clark [Wed, 15 Apr 2015 19:49:15 +0000 (15:49 -0400)]
nir/builder: add nir_builder_insert_after_instr()
For lowering if/else, I need a way to insert at the end of the previous
block.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 16 Apr 2015 19:16:12 +0000 (15:16 -0400)]
gallium/ttn: fix TXF
There is a level param stashed away in the .w component of the first
src.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Sun, 12 Apr 2015 12:15:33 +0000 (08:15 -0400)]
gallium/ttn: add UBO support
v2: move ishl into ttn (instead of driver backend) to keep the units
consistent between immediate and indirect offsets
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Sat, 11 Apr 2015 19:25:58 +0000 (15:25 -0400)]
gallium/ttn: minor cleanup
v2: also use ttn_src_for_indirect() everywhere for addr access, rather
than open-coding it for INPUT/CONST srcs
v3: move ralloc out of ttn_src_for_indirect() into the one call site
that needs a ptr
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Sat, 11 Apr 2015 15:37:12 +0000 (11:37 -0400)]
gallium/ttn: add support for TXL2
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Sat, 11 Apr 2015 15:35:29 +0000 (11:35 -0400)]
gallium/ttn: add support for texture offsets
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Brian Paul [Fri, 17 Apr 2015 14:14:23 +0000 (15:14 +0100)]
mesa/st: Free st_translate with FREE macro.
To match CALLOC_STRUCT macro.
Fixes memory corruption on Windows when u_memory's memory debugging is
enabled.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Jose Fonseca [Thu, 16 Apr 2015 12:08:56 +0000 (13:08 +0100)]
libgl-gdi: Prevent "pure virtual method called" error when.
When running piglit w/ llvmpipe on Windows several tests terminate
abnormally just when the test exits.
The problem was that LLVMContextDispose was being called
after LLVM global destructors.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Ville Syrjälä [Thu, 16 Apr 2015 16:21:07 +0000 (19:21 +0300)]
i965: Add marketing names for CHV
All CHV devices will be branded as "Intel(r) HD Graphics".
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Ian Romanick [Wed, 15 Apr 2015 22:20:57 +0000 (15:20 -0700)]
nir: Convert the if-test for num_inputs == 2 to an assertion
Suggested by Jason on a different patch after some comments /
questions by Ilia.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabott0@gmail.com>
Marek Olšák [Mon, 13 Apr 2015 19:44:02 +0000 (21:44 +0200)]
configure.ac: print LLVM_LDFLAGS
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velilkov@gmail.com>
Marek Olšák [Sat, 11 Apr 2015 18:05:41 +0000 (20:05 +0200)]
glsl_to_tgsi: only associate the uniform storage once at link time
This hack is no longer needed. (see the previous commit)
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 11 Apr 2015 18:01:22 +0000 (20:01 +0200)]
glsl_to_tgsi: add STATE_FB_WPOS_Y_TRANSFORM at link time
This will allow removing the uniform storage re-association during
TGSI generation at draw time.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 11 Apr 2015 12:40:09 +0000 (14:40 +0200)]
glsl_to_tgsi: add assertions for detecting out-of-bounds immediates access
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 11 Apr 2015 12:55:26 +0000 (14:55 +0200)]
glsl_to_tgsi: don't use a potentially-undefined immediate for ir_query_levels
Cc: 10.4 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 11 Apr 2015 11:49:38 +0000 (13:49 +0200)]
glsl_to_tgsi: fix out-of-bounds constant access and crash for uniforms
This fixes piglit shaders@glsl-fs-uniform-array-loop-unroll with immediate
shader compilation - it's a compiler test, so it has never been translated
to TGSI before.
Cc: 10.4 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 18 Mar 2015 11:38:19 +0000 (12:38 +0100)]
glsl_to_tgsi: cleanup includes
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 11 Apr 2015 17:35:40 +0000 (19:35 +0200)]
mesa/program: remove dead code
Reviewed-by: Matt Turner <mattst88@gmail.com>
Marek Olšák [Fri, 10 Apr 2015 21:58:34 +0000 (23:58 +0200)]
radeonsi: add a debug option to compile shaders when they're created
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Marek Olšák [Fri, 10 Apr 2015 21:58:34 +0000 (23:58 +0200)]
st/mesa: add a debug option to compile shaders at link time
v2: fix crashes
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Kristian Høgsberg [Tue, 14 Apr 2015 15:02:18 +0000 (15:02 +0000)]
i965: Rewrite ir_tex to ir_txl with lod 0 for vertex shaders
The ir_tex opcode turns into a sample or sample_c message, which will try to
compute derivatives to determine the lod. This produces garbage for
non-fragment shaders where the sample coordinates don't correspond to
subspans.
We fix this by rewriting the opcode from ir_tex to ir_txl and setting the
lod to 0.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89457
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kristian Høgsberg <kristian.h.kristensen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Emil Velikov [Wed, 8 Apr 2015 18:27:02 +0000 (19:27 +0100)]
radeonsi: remove bogus r600-- triple
As mentioned by Michel Dänzer for LLVM >= 3.6 we create the
LLVMTargetMachine (with triple amdgcn--), as we setup the radeonsi
context. For older LLVM or hardware (r600) the triple is always r600--
and is created at a later stage - radeon_llvm_compile()
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Neil Roberts [Tue, 24 Mar 2015 15:52:20 +0000 (15:52 +0000)]
i965/skl: Add the header for constant loads outside of the generator
Commit
5a06ee738 added a step to the generator to set up the message
header when generating the VS_OPCODE_PULL_CONSTANT_LOAD_GEN7
instruction. That pseudo opcode is implemented in terms of multiple
actual opcodes, one of which writes to one of the source registers in
order to set up the message header. This causes problems because the
scheduler isn't aware that the source register is written to and it
can end up reorganising the instructions incorrectly such that the
write to the source register overwrites a needed value from a previous
instruction. This problem was presenting itself as a rendering error
in the weapon in Enemy Territory: Quake Wars.
Since commit
588859e1 there is an additional problem that the double
register allocated to include the message header would end up being
split into two. This wasn't happening previously because the code to
split registers was explicitly avoided for instructions that are
sending from the GRF.
This patch fixes both problems by splitting the code to set up the
message header into a new pseudo opcode so that it will be done
outside of the generator. This new opcode has the header register as a
destination so the scheduler can recognise that the register is
written to. This has the additional benefit that the scheduler can
optimise the message header slightly better by moving the mov
instructions further away from the send instructions.
On Skylake it appears to fix the following three Piglit tests without
causing any regressions:
gs-float-array-variable-index
gs-mat3x4-row-major
gs-mat4x3-row-major
I think we actually may need to do something similar for the fs
backend and possibly for message headers from regular texture sampling
but I'm not entirely sure.
v2: Make sure the exec-size is retained as 8 for the mov instruction
to initialise the header from g0. This was accidentally lost
during a rebase on top of
07c571a39fa1.
Split the patch into two so that the helper function is a separate
change.
Fix emitting the MOV instruction on Gen7.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89058
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Neil Roberts [Wed, 15 Apr 2015 13:28:26 +0000 (14:28 +0100)]
i965/vec4: Add a helper function to emit VS_OPCODE_PULL_CONSTANT_LOAD
There were three places in the visitor that had a similar chunk of
code to emit the VS_OPCODE_PULL_CONSTANT_LOAD opcode using a register
for the offset. This patch combines the chunks into a helper function
to reduce the code duplication. It will also be useful in the next
patch to expand what happens on Gen9+. This shouldn't introduce any
functional changes.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Jose Fonseca [Thu, 16 Apr 2015 09:19:57 +0000 (10:19 +0100)]
mesa,glsl: rename `interface` to `programInterface`.
`interface` is a define on Windows -- an alias for `struct` keyword,
used when declaring COM interfaces in C or C++.
So use instead `programInterface`, therefore matching the name used
in GL_ARB_program_interface_query spec/headers, which was renamed exactly
for the same reason:
"Revision 10, May 10, 2012 (pbrown)
- Rename the formal parameter <interface> used by the functions in this
extension to <programInterface>. Certain versions of the Microsoft
C/C++ compiler and/or its headers cause "interface" to be treated as a
reserved keyword."
Trivial.
Flora Cui [Tue, 24 Mar 2015 10:34:29 +0000 (18:34 +0800)]
gbm: Add GBM_BO_USE_LINEAR flag
Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tapani Pälli [Fri, 13 Mar 2015 06:53:23 +0000 (08:53 +0200)]
mesa: refactor GetUniformBlockIndex
Use _mesa_program_resource_index to get index.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 12:37:20 +0000 (14:37 +0200)]
mesa: refactor GetUniformIndices
Use _mesa_program_resource_index to get indices.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 12:31:15 +0000 (14:31 +0200)]
mesa: refactor GetUniformLocation
Use _mesa_program_resource_location to get location.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 11:33:25 +0000 (13:33 +0200)]
mesa: refactor GetActiveUniformBlockName
Use _mesa_get_program_resource_name to get name.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 11:53:07 +0000 (13:53 +0200)]
mesa: remove unused _mesa_get_uniform_name
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 11:22:16 +0000 (13:22 +0200)]
mesa: refactor GetActiveUniformName
Use _mesa_get_program_resource_name to get name.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 10:55:18 +0000 (12:55 +0200)]
mesa: refactor GetActiveUniform
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 10:08:56 +0000 (12:08 +0200)]
mesa: refactor GetTransformFeedbackVarying
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 08:17:09 +0000 (10:17 +0200)]
mesa: refactor GetActiveUniformsiv, use _mesa_program_resource_prop
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tapani Pälli [Thu, 12 Mar 2015 05:58:48 +0000 (07:58 +0200)]
mesa: mesa_bufferiv utility function for buffer objects
Patch adds new function 'mesa_bufferiv' and refactors existing
GetActiveUniformBlockiv and GetActiveAtomicCounterBufferiv to
use it.
corresponding Piglit tests:
arb_uniform_buffer_object*
arb_shader_atomic_counters*
(Many tests hit the corresponding queries.)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 13:14:31 +0000 (15:14 +0200)]
mesa: refactor GetFragDataIndex
Use _mesa_program_resource_location_index to fetch index.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 13:13:30 +0000 (15:13 +0200)]
mesa: refactor GetFragDataLocation
Use program_resource_location to fetch location.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 13:11:04 +0000 (15:11 +0200)]
mesa: refactor GetAttribLocation
Use program_resource_location to fetch location.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Wed, 11 Mar 2015 07:05:47 +0000 (09:05 +0200)]
mesa: refactor GetActiveAttrib
Instead of iterating IR, retrieve required information through
the new program resource functions.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tapani Pälli [Tue, 7 Apr 2015 09:07:03 +0000 (12:07 +0300)]
mesa: enable GL_ARB_program_interface_query extension
(and mark it as DONE in docs/GL3.txt + 10.6.0 relnotes)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Tue, 10 Mar 2015 11:11:14 +0000 (13:11 +0200)]
mesa: implementation of glGetProgramResourceiv
Patch adds required helper functions to shaderapi.h and
the actual implementation.
The property query functionality can be tested with tests for
following functions that are refactored by later patches:
GetActiveAtomicCounterBufferiv
GetActiveUniformBlockiv
GetActiveUniformsiv
v2: code cleanup (Ilia Mirkin)
add bufSize < 0 check and error out
fix is_resource_referenced to return bool
check for propCount and bufSize, fixes in buffer_prop
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 12:08:38 +0000 (14:08 +0200)]
mesa: glGetProgramResourceLocationIndex
Patch adds required helper functions to shaderapi.h and
the actual implementation.
The added functionality can be tested by tests for following
functions that are refactored by later patches:
GetFragDataIndex
v2: return -1 if output not referenced by fragment stage
(Ilia Mirkin)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 12 Mar 2015 11:45:22 +0000 (13:45 +0200)]
mesa: glGetProgramResourceLocation
Patch adds required helper functions to shaderapi.h and
the actual implementation.
corresponding Piglit test:
arb_program_interface_query-resource-location
The added functionality can be tested by tests for following
functions that are refactored by later patches:
GetAttribLocation
GetUniformLocation
GetFragDataLocation
v2: code cleanup, changes to array element
syntax checking (Ilia Mirkin)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Tue, 10 Mar 2015 08:33:20 +0000 (10:33 +0200)]
mesa: glGetProgramResourceName
Patch adds required helper functions to shaderapi.h and
the actual implementation.
Name generation copied from '_mesa_get_uniform_name' which can
be removed later by refactoring functions to use resource list.
The added functionality can be tested by tests for following
functions that are refactored by later patches:
GetActiveUniformName
GetActiveUniformBlockName
v2: no index for geometry shader inputs (Ilia Mirkin)
add bufSize < 0 check and error out
validate enum
corresponding Piglit test:
arb_program_interface_query-getprogramresourcename
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.org>
Tapani Pälli [Tue, 10 Mar 2015 07:30:30 +0000 (09:30 +0200)]
mesa: glGetProgramResourceIndex
Patch adds required helper functions to shaderapi.h and
the actual implementation.
v2: code cleanup (Ilia Mirkin)
corresponding Piglit test:
arb_program_interface_query-getprogramresourceindex
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.org>
Tapani Pälli [Fri, 6 Mar 2015 13:05:51 +0000 (15:05 +0200)]
mesa: glGetProgramInterfaceiv
Patch adds required helper functions to shaderapi.h and
the actual implementation.
v2: code cleanup (Ilia Mirkin)
fix array size fo xfb varyings
validate programInterface and throw error
v3: put GL_MAX_NUM_COMPATIBLE_SUBROUTINES where
it belongs
corresponding Piglit test:
arb_program_interface_query-getprograminterfaceiv
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Fri, 6 Mar 2015 07:14:49 +0000 (09:14 +0200)]
mesa/glsl: build list of program resources during linking
Patch adds ProgramResourceList to gl_shader_program structure.
List contains references to active program resources and is
constructed during linking phase.
This list will be used by follow-up patches to implement hooks
for GL_ARB_program_interface_query. It can be also used to
implement any of the older shader program query APIs.
v2: code cleanups + note for SSBO and subroutines (Ilia Mirkin)
v3: code cleanups + assert(MESA_SHADER_STAGES < 8) (Martin Peres)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Mon, 16 Feb 2015 12:15:36 +0000 (14:15 +0200)]
glapi: add GL_ARB_program_interface_query skeleton
v2: update dispatch_sanity test (Jason Ekstrand)
+ small code cleanups
v3: xml and Makefile fixes (Ilia Mirkin, Matt Turner)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Tue, 17 Mar 2015 11:58:57 +0000 (13:58 +0200)]
linker: fix varying linking if SSO program has only gs and fs
Previously linker did not take in to account case where one would
have only gs and fs (with SSO), patch adds the case by refactoring
code around assign_varying_locations. This makes sure locations for
gs get populated correctly.
This was found with some of the SSO subtests of Martin's upcoming
GetProgramInterfaceiv Piglit test which passes with the patch, no
Piglit regressions.
v2: code cleanups (Martin Peres)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Glenn Kennard [Wed, 8 Apr 2015 09:30:37 +0000 (11:30 +0200)]
r600g/sb: Skip empty ALU clause while scheduling
Fixes assert triggered by
ext_transform_feedback-intervening-read output use_gs
piglit test.
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ian Romanick [Mon, 13 Apr 2015 23:16:10 +0000 (16:16 -0700)]
nir: Try commutative sources in CSE
Shader-db results:
GM45 NIR:
total instructions in shared programs:
4082044 ->
4081919 (-0.00%)
instructions in affected programs: 27609 -> 27484 (-0.45%)
helped: 44
Iron Lake NIR:
total instructions in shared programs:
5678776 ->
5678646 (-0.00%)
instructions in affected programs: 27406 -> 27276 (-0.47%)
helped: 45
Sandy Bridge NIR:
total instructions in shared programs:
7329995 ->
7329096 (-0.01%)
instructions in affected programs: 142035 -> 141136 (-0.63%)
helped: 406
HURT: 19
Ivy Bridge NIR:
total instructions in shared programs:
6769314 ->
6768359 (-0.01%)
instructions in affected programs: 140820 -> 139865 (-0.68%)
helped: 423
HURT: 2
Haswell NIR:
total instructions in shared programs:
6183693 ->
6183298 (-0.01%)
instructions in affected programs: 96538 -> 96143 (-0.41%)
helped: 303
HURT: 4
Broadwell NIR:
total instructions in shared programs:
7501711 ->
7498170 (-0.05%)
instructions in affected programs: 266403 -> 262862 (-1.33%)
helped: 705
HURT: 5
GAINED: 4
v2: Rebase on top of Connor's fix.
v3: Convert the if-test for num_inputs == 2 to an assertion. Suggested
by Jason after some comments / questions by Ilia.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> [v1]
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: Connor Abbott <cwabbott0@gmail.com>
Ian Romanick [Tue, 14 Apr 2015 16:24:06 +0000 (09:24 -0700)]
glx: Create proper server dependency for GLX_EXT_create_context_es2_profile
Previously GLX_EXT_create_context_es2_profile was marked as "direct
only" so that it would not depend on server support. Since the
extension required functions that are part of
GLX_ARB_create_context_profile, support for the EXT was disabled if the
ARB was not supported.
This was complete rubbish. If the server supported the ARB but not the
EXT, sending a request with GLX_CONTEXT_ES2_PROFILE_BIT_EXT would result
in GLXBadProfileARB.
Instead of the misguided hack, make GLX_EXT_create_context_es2_profile
properly depend on server support by not marking it as "direct only."
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Eric Anholt [Wed, 15 Apr 2015 05:01:55 +0000 (22:01 -0700)]
vc4: Don't try to use color load/stores to blit across format changes.
We could potentially support the right combination of 8888 to 565, but the
important thing for now is to not mix up our orderings of 8888. Fixes
fbo-copyteximage regressions.
Eric Anholt [Wed, 15 Apr 2015 04:59:46 +0000 (21:59 -0700)]
vc4: Don't try to use color load/stores to do depth/stencil blits.
Fixes regressions in fbo-generatemipmap-formats on depth/stencil (which
does blits to work around baselevel/lastlevel).
Eric Anholt [Tue, 14 Apr 2015 18:31:11 +0000 (11:31 -0700)]
vc4: Update the shadow texture for public textures on every draw.
We don't know who else has written to it, so we'd better update it every
time. This makes the gears spin in X again.
Eric Anholt [Tue, 14 Apr 2015 18:24:00 +0000 (11:24 -0700)]
vc4: Hook up VC4_DEBUG=perf to some useful printfs.
Brian Paul [Tue, 14 Apr 2015 16:54:34 +0000 (10:54 -0600)]
st/mesa: log shaders, GLSL info log with _mesa_log()
As with previous patch.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 14 Apr 2015 16:41:56 +0000 (10:41 -0600)]
mesa: log shaders, GLSL info log with _mesa_log()
Now, if we set MESA_LOG_FILE and MESA_GLSL=dump, all the shader info
will get logged to the named file instead of stderr.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 14 Apr 2015 16:24:22 +0000 (10:24 -0600)]
mesa: add _mesa_log(), _mesa_get_log_file() functions
_mesa_log() simply writes log information to stderr or MESA_LOG_FILE.
_mesa_get_log_file() returns the file handle to use for logging.
This will be used for shader dumping/logging instead of always printing
to stderr.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Thu, 9 Apr 2015 19:45:18 +0000 (13:45 -0600)]
tgsi: also dump label for TGSI_OPCODE_BGNSUB opcode
So we can see the label associated with subroutines.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Jose Fonseca [Tue, 14 Apr 2015 13:25:21 +0000 (14:25 +0100)]
st/wgl: Couple of fixes to opengl32.dll's wglCreateContext/wglDeleteContext dispatch.
- Use GetModuleHandle instead of LoadLibrary to avoid incrementing the
opengl32.dll reference count (otherwise the opengl32.dll will linger
in memory forever.)
- Ensure we use our fake wglCreateContext/wglDeleteContext when using
Mesa as a drop-in replacement for opengl32.dll
Untested. Just noticed by accident.
Reviewed-by: Brian Paul <brianp@vmware.com>
Jose Fonseca [Tue, 14 Apr 2015 13:25:06 +0000 (14:25 +0100)]
mesa: Enable _mesa_dlopen on MSVC too.
As pointed out by Shervin Sharifi.
Reviewed-by: Brian Paul <brianp@vmware.com>
Samuel Iglesias Gonsalvez [Thu, 27 Nov 2014 08:39:05 +0000 (09:39 +0100)]
glsl: fix assignment of multiple scalar and vecs to matrices.
When a vec has more elements than row components in a matrix, the
code could end up failing an assert inside assign_to_matrix_column().
This patch makes sure that when there is still room in the matrix for
more elements (but in other columns of the matrix), the data is actually
assigned.
This patch fixes the following dEQP test:
dEQP-GLES3.functional.shaders.conversions.matrix_combine.float_bvec4_ivec2_bool_to_mat4x2_vertex
dEQP-GLES3.functional.shaders.conversions.matrix_combine.float_bvec4_ivec2_bool_to_mat4x2_fragment
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Ian Romanick [Tue, 14 Apr 2015 15:40:22 +0000 (08:40 -0700)]
nir: Fix typo in "ushr by 0" algebraic replacement
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Cc: "10.5" <mesa-stable@lists.freedestkop.org>
Ian Romanick [Mon, 13 Apr 2015 23:42:59 +0000 (16:42 -0700)]
nir: Silence unused parameter warnings
nir/nir.h: In function 'nir_validate_shader':
nir/nir.h:1567:56: warning: unused parameter 'shader' [-Wunused-parameter]
static inline void nir_validate_shader(nir_shader *shader) { }
^
nir/nir_opt_cse.c: In function 'src_is_ssa':
nir/nir_opt_cse.c:165:32: warning: unused parameter 'data' [-Wunused-parameter]
src_is_ssa(nir_src *src, void *data)
^
nir/nir_opt_cse.c: In function 'dest_is_ssa':
nir/nir_opt_cse.c:171:35: warning: unused parameter 'data' [-Wunused-parameter]
dest_is_ssa(nir_dest *dest, void *data)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Connor Abbott [Tue, 14 Apr 2015 19:44:24 +0000 (15:44 -0400)]
nir/cse: fix bug with comparing non-per-component sources
We weren't comparing the right number of components when checking
swizzles. Use nir_ssa_alu_instr_num_src_components() to do the right
thing.
No piglit regressions, and no fixes either.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Ben Widawsky [Sun, 8 Feb 2015 21:59:57 +0000 (13:59 -0800)]
i965/fs: Combine tex/fb_write operations (opt)
Certain platforms support the ability to sample from a texture, and write it out
to the file RT - thus saving a costly send instructions (note that this is a
potnential win if one wanted to backport to a tag that didn't have the patch
from Topi which removed excess MOVs from LOAD_PAYLOAD -
97caf5fa04dbd2),
v2: Modify the algorithm. Instead of iterating in reverse through blocks and
insts, since the last block/inst is the only thing which can benefit. Rebased
on top of Ken's patching modifying is_last_send
v3: Rebased over almost 2 months, and Incorporated feedback from Matt:
Some comment typo fixes and rewordings.
Whitespace
Move the optimization pass outside of the optimize loop
v4: Some cosmetic changes requested from Ken. These changes ensured that the
optimization function always returned true when an optimization occurred, and
false when one did not. This behavior did not exist with the original patch. As
a result, having the separate helper function which Matt did not like no longer
made sense, and so now I believe everyone should be happy.
Benchmark (n=20) %diff
*OglBatch5 -1.4
*OglBatch7 -1.79
OglFillTexMulti 5.57
OglFillTexSingle 1.16
OglShMapPcf 0.05
OglTexFilterAniso 3.01
OglTexFilterTri 1.94
No piglit regressions:
(http://otc-gfxtest-01.jf.intel.com:8080/view/dev/job/bwidawsk/112/)
[*] I believe my measurements are incorrect for Batch5-7. If I add this new
optimization, but never emit the new instruction I see similar results.
v5: Remove declaration of combine_tex_header since v4 dropped that function
(Ben)
Remove check for impossible case of an empty block (Matt)
Set dest earlier to avoid extra special-casing in generate_tex (Matt)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ben Widawsky [Fri, 10 Apr 2015 17:04:55 +0000 (10:04 -0700)]
i965/fs: Only emit FS_OPCODE_PLACEHOLDER_HALT if there are discards
Based originally on a patch from Ken in May 2014 of the same title. Things
changed enough that I didn't feel comfortable leaving his authorship.
v2: Replace fp->UsesKill with wm_prog_data->uses_kill. Since Ken took the time
to also explain the difference to me, here is his explanation for posterity:
"fp->UsesKill indicates that a ARB_fragment_program shader uses the KIL
instruction, or that a GLSL shader uses the "discard" insntruction
(which are analogous).
On Gen4-5, we sometimes have to simulate OpenGL's "Alpha Test" feature
by emitting shader code that implicitly does a "discard" instruction.
In the key setup, we do:
/* key->alpha_test_func means simulating alpha testing via discards,
* so the shader definitely kills pixels.
*/
prog_data.uses_kill = fp->program.UsesKill || key->alpha_test_func;
Even though the shader may not technically contain a "discard", we need
to act as if it does.
I've also been trying to move the i965 state setup code to use
brw_wm_prog_key for everything, rather than poking at core Mesa's
gl_program/gl_fragment_program/gl_shader/gl_shader_program structures.
--Ken"
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ben Widawsky [Tue, 31 Mar 2015 22:49:42 +0000 (15:49 -0700)]
i965/fs: Create a has_side_effects for fs_inst
When an instruction has a side effect, it impacts the available options when
reordering an instruction. As the EOT flag is an implied write to the render
target in the FS, it can be considered a side effect.
This patch shouldn't actually have any impact on the current code since the EOT
flag implies that the opcode is already one with side effects,
FS_OPCODE_FB_WRITE. The next patch however will introduce an optimization
whereby the EOT flag can occur with an opcode SHADER_OPCODE_TEX, and as that
instruction will perform the same implied write to the render target, it cannot
be reordered.
v2: Remove extra whitespace (Matt)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Marius Predut [Tue, 7 Apr 2015 19:05:28 +0000 (22:05 +0300)]
i965: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Marius Predut [Tue, 7 Apr 2015 19:05:44 +0000 (22:05 +0300)]
i915: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Marius Predut [Tue, 7 Apr 2015 19:06:01 +0000 (22:06 +0300)]
glx: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Marius Predut [Tue, 7 Apr 2015 19:04:58 +0000 (22:04 +0300)]
main: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Marius Predut [Tue, 7 Apr 2015 19:04:38 +0000 (22:04 +0300)]
state_tracker: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Marius Predut [Tue, 7 Apr 2015 19:03:52 +0000 (22:03 +0300)]
swrast: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Marius Predut [Fri, 3 Apr 2015 12:02:33 +0000 (15:02 +0300)]
vbo: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Marius Predut [Fri, 3 Apr 2015 13:11:57 +0000 (16:11 +0300)]
tnl: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Matt Turner [Mon, 13 Apr 2015 18:29:14 +0000 (11:29 -0700)]
i965/fs: Correct mistake in determining whether a MUL is negated.
a * b is equivalent to -a * -b, and the previous code was failing at
that.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89961
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Neil Roberts [Fri, 10 Apr 2015 16:20:21 +0000 (17:20 +0100)]
i965/skl: Use an exec size of 8 to initialise the message header
Commit
e93566a15c61c33faa changed the message header code needed to
make Skylake use SIMD4x2 so that it uses a register with width 4
instead of 8 as the source register in the send message. However it
also changed the width for the dest in the MOV instruction which is
used to initialise the header register with the values from g0. The
width of the destination is used to determine the exec size in
brw_set_dest so this would end up making the MOV have an exec size of
4. I think this would end up leaving the top half of the register
uninitialised. The top half of the header has meaningful values so
this probably isn't a good idea.
This patch just casts the dest register for the MOV instruction back
to a vec8 to fix it. It doesn't cause any changes to a Piglit run.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Ian Romanick [Mon, 23 Mar 2015 19:03:56 +0000 (12:03 -0700)]
i965/fs: Always invert predicate of SEL with swapped arguments
Commit
b616164 added an optimization of b2f generation of a comparison.
It also included an extra optimization of one of the comparison values
is a constant of zero. The trick was that some value was known to be
zero, so that value could be used in the SEL instruction instead of
potentially loading 0.0 into a register.
This change switched the order of the arguments to the SEL, and, for
some unknown reason, I thought that the predicate should therefore
only be inverted for the == case. Clearly, it should always be
inverted.
Fixes piglit fs-notEqual-of-expression.shader_test and
fs-equal-of-expression.shader_test.
v2: Don't do the "register already has zero" optimization for the '== 0'
case. In that case, the register does not have zero when we want to
produce a zero result.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89722
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v1]
Tested-by: Lu Hua <huax.lu@intel.com>
Tom Stellard [Mon, 13 Apr 2015 13:25:41 +0000 (13:25 +0000)]
radeon/llvm: Improve codegen for KILL_IF
Rather than emitting one kill instruction per component of KILL_IF's src
reg, we now or the components of the src register together and use the
result as a condition for just one kill instruction.
shader-db stats (bonaire):
979 shaders
Totals:
SGPRS: 34872 -> 34848 (-0.07 %)
VGPRS: 20696 -> 20676 (-0.10 %)
Code Size: 749032 -> 748452 (-0.08 %) bytes
LDS: 11 -> 11 (0.00 %) blocks
Scratch: 12288 -> 12288 (0.00 %) bytes per wave
Totals from affected shaders:
SGPRS: 1184 -> 1160 (-2.03 %)
VGPRS: 600 -> 580 (-3.33 %)
Code Size: 13200 -> 12620 (-4.39 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
Increases:
SGPRS: 2 (0.00 %)
VGPRS: 0 (0.00 %)
Code Size: 0 (0.00 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)
Decreases:
SGPRS: 5 (0.01 %)
VGPRS: 5 (0.01 %)
Code Size: 25 (0.03 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)
*** BY PERCENTAGE ***
Max Increase:
SGPRS: 32 -> 40 (25.00 %)
VGPRS: 0 -> 0 (0.00 %)
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
Max Decrease:
SGPRS: 32 -> 24 (-25.00 %)
VGPRS: 16 -> 12 (-25.00 %)
Code Size: 116 -> 96 (-17.24 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
*** BY UNIT ***
Max Increase:
SGPRS: 64 -> 72 (12.50 %)
VGPRS: 0 -> 0 (0.00 %)
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
Max Decrease:
SGPRS: 32 -> 24 (-25.00 %)
VGPRS: 16 -> 12 (-25.00 %)
Code Size: 424 -> 356 (-16.04 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tom Stellard [Fri, 10 Apr 2015 17:07:16 +0000 (17:07 +0000)]
radeon/llvm: Run LLVM's instruction combining pass
This should improve code quality in general and will help with some
future changes to how we emit kill instructions.
shader-db shows a few regressions, but these don't seem to be the result
of deficiencies in instcombine. They're mostly caused by the scheduler
making different decisions than before.
shader-db stats (bonaire):
979 shaders
Totals:
SGPRS: 35056 -> 34872 (-0.52 %)
VGPRS: 20624 -> 20696 (0.35 %)
Code Size: 764372 -> 749032 (-2.01 %) bytes
LDS: 11 -> 11 (0.00 %) blocks
Scratch: 12288 -> 12288 (0.00 %) bytes per wave
Totals from affected shaders:
SGPRS: 13264 -> 13072 (-1.45 %)
VGPRS: 8248 -> 8316 (0.82 %)
Code Size: 486320 -> 470992 (-3.15 %) bytes
LDS: 11 -> 11 (0.00 %) blocks
Scratch: 11264 -> 11264 (0.00 %) bytes per wave
Increases:
SGPRS: 6 (0.01 %)
VGPRS: 20 (0.02 %)
Code Size: 14 (0.01 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)
Decreases:
SGPRS: 32 (0.03 %)
VGPRS: 8 (0.01 %)
Code Size: 244 (0.25 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)
*** BY PERCENTAGE ***
Max Increase:
SGPRS: 32 -> 48 (50.00 %)
VGPRS: 12 -> 20 (66.67 %)
Code Size: 216 -> 224 (3.70 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
Max Decrease:
SGPRS: 40 -> 32 (-20.00 %)
VGPRS: 16 -> 12 (-25.00 %)
Code Size: 368 -> 280 (-23.91 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
*** BY UNIT ***
Max Increase:
SGPRS: 32 -> 48 (50.00 %)
VGPRS: 28 -> 36 (28.57 %)
Code Size: 39320 -> 40132 (2.07 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
Max Decrease:
SGPRS: 72 -> 64 (-11.11 %)
VGPRS: 48 -> 40 (-16.67 %)
Code Size: 6272 -> 5852 (-6.70 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tom Stellard [Mon, 13 Apr 2015 12:56:37 +0000 (12:56 +0000)]
radeonsi: Add header and footer to shader stat dump
This makes it easier to parse.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Sat, 11 Apr 2015 09:21:48 +0000 (02:21 -0700)]
i965: Fix software primitive restart with indirect draws.
new_prim was declared as a stack variable within a nested scope; we
tried to retain a pointer to that data beyond the scope, which is bogus.
GCC with -O1 eliminated most of the code that set new_prim's fields.
Move the declaration to fix the bug.
v2: Also fix new_ib (thanks to Matt Turner and Ben Widawsky).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81025
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Mon, 13 Apr 2015 01:39:07 +0000 (18:39 -0700)]
i965: Implement proper workaround for Gen4 GPU CONSTANT_BUFFER hangs.
I finally managed to dig up some information on our mysterious GPU hangs.
A wiki page from the Crestline validation team mentions that they found
a GPU hang in "Serious Sam 2" (on Windows) with remarkably similar
conditions to the ones we've seen in Google Chrome and glmark2.
Apparently, if WM_STATE has "PS Use Source Depth" enabled, CC_STATE has
most depth state disabled, and you issue a CONSTANT_BUFFER command and
immediately draw, the depth interpolator makes a small mistake that
leads to hangs.
Most of the traces I looked at contained a CONSTANT_BUFFER packet
immediately followed by 3DPRIMITIVE, or at least very few packets.
It appears they also have "PS Use Source Depth" enabled - either at the
hang, or a little before it. So I think this is our bug.
The workaround is to emit a non-pipelined state packet after issuing a
CONSTANT_BUFFER packet. This is really similar to the workaround I
developed in commit
c4fd0c9052dd391d6f2e9bb8e6da209dfc7ef35b.
v2: Fix word-wrapping issues.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Sun, 12 Apr 2015 10:52:39 +0000 (03:52 -0700)]
i965: Fix INTEL_DEBUG=shader_time for SIMD8 VS.
In commit
4ebeb71573ad44f7657810dc5dd2c9030e3e63db, I deleted the
emit_shader_time_end() call in emit_urb_writes(). But I failed to add
it to run_vs(), as I intended. So no data was recorded at all.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Mon, 6 Apr 2015 22:12:58 +0000 (15:12 -0700)]
vc4: Add a blitter path using just the render thread.
This accelerates the path for generating the shadow tiled texture when
asked to sample from a raster texture (typical in glamor).
Eric Anholt [Thu, 9 Apr 2015 20:35:57 +0000 (13:35 -0700)]
vc4: Allow submitting jobs with no bin CL in validation.
For blitting, we want to fire off an RCL-only job. This takes a bit of
tweaking in our validation and the simulator support (and corresponding
new code in the kernel).
Eric Anholt [Thu, 9 Apr 2015 19:12:20 +0000 (12:12 -0700)]
vc4: Move the blit code to a separate file.
There will be other blit code showing up, and it seems like the place
you'd look.
Eric Anholt [Mon, 6 Apr 2015 19:58:51 +0000 (12:58 -0700)]
vc4: Separate out a bit of code for submitting jobs to the kernel.
I want to be able to have multiple jobs being set up at the same time (for
example, a render job to do a little fixup blit in the course of doing a
render to the main FBO).
Eric Anholt [Wed, 8 Apr 2015 19:49:24 +0000 (12:49 -0700)]
vc4: When asked to sample from a raster texture, make a shadow tiled copy.
So, it turns out my simulator doesn't *quite* match the hardware. And the
errata about raster textures tells you most of what's wrong, but there's
still stuff wrong after that. Instead, if we're asked to sample from
raster, we'll just blit it to a tiled temporary.
Raster textures should only be screen scanout, and word is that it's
faster to copy to tiled using the tiling engine first than to texture from
an entire raster texture, anyway.
Eric Anholt [Thu, 9 Apr 2015 20:43:55 +0000 (13:43 -0700)]
vc4: Fix off-by-one in branch target validation.
Eric Anholt [Mon, 13 Apr 2015 21:12:59 +0000 (14:12 -0700)]
vc4: Use NIR-level lowering for idiv.
This fixes the idiv tests in piglit.
Eric Anholt [Wed, 1 Apr 2015 22:35:13 +0000 (15:35 -0700)]
vc4: Add a bunch of type conversions.
These are required to get piglit's idiv tests working. The
unsigned<->float conversions are wrong, but are good enough to get
piglit's small ranges of values working.
Dave Airlie [Wed, 8 Apr 2015 00:00:27 +0000 (10:00 +1000)]
st/mesa: align cube map arrays layers
We create textures internally for texsubimage, and we use
the values from sub image to create a new texture, however
we don't align these to valid sizes, and cube map arrays
must have an array size aligned to 6.
This fixes texsubimage cube_map_array on CAYMAN at least,
(it was causing GPU hang and bad values), it probably
also fixes it on radeonsi and evergreen.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89957
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 8 Apr 2015 00:59:20 +0000 (10:59 +1000)]
st/mesa: convert sub image for cube map arrays to 2d arrays for upload
Since we can subimage upload a number of cube map array layers,
that aren't a complete cube map array, we should specify things
as a 2D array and blit from that.
Suggested by Ilia Mirkin as an alternate fix for texsubimage
cube map array issues.
seems to work just as well.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Mathias Froehlich [Sun, 12 Apr 2015 16:23:58 +0000 (18:23 +0200)]
i965: Flush batchbuffer containing the query on glQueryCounter.
This change fixes a regression with timer queries introduced with
commit
3eb6258. There the pending batchbuffer is flushed
only if glEndQuery is executed. This present change adds such
a flush to glQueryCounter which also schedules a value query
just like glEndQuery does. The patch fixes GPU timer queries
going mad from within osgviewer.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
Cc: mesa-stable@lists.freedesktop.org
Eric Anholt [Wed, 8 Apr 2015 20:11:01 +0000 (13:11 -0700)]
vc4: Use the blit interface for updating shadow textures.
This lets us plug in a better blit implementation and have it impact the
shadow update, too.
Eric Anholt [Thu, 9 Apr 2015 20:13:23 +0000 (13:13 -0700)]
vc4: Remove dead fields from vc4_surface.