mesa.git
7 years agoradeonsi/gfx9: add VS prolog support for merged LS-HS
Marek Olšák [Mon, 20 Feb 2017 21:25:17 +0000 (22:25 +0100)]
radeonsi/gfx9: add VS prolog support for merged LS-HS

HS input VGPRs must be reserved.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: merged shaders have scratch offset at the beginning
Marek Olšák [Sat, 18 Feb 2017 02:04:21 +0000 (03:04 +0100)]
radeonsi/gfx9: merged shaders have scratch offset at the beginning

also, screen wasn't initialized for compute shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: define LS-HS main shader function prototype
Marek Olšák [Sat, 18 Feb 2017 00:47:27 +0000 (01:47 +0100)]
radeonsi/gfx9: define LS-HS main shader function prototype

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: assign VS/TCS/TES/GS shader input parameter locations dynamically
Marek Olšák [Fri, 17 Feb 2017 17:29:17 +0000 (18:29 +0100)]
radeonsi: assign VS/TCS/TES/GS shader input parameter locations dynamically

They will vary with merged stages.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: define and set LS-HS user SGPRs
Marek Olšák [Wed, 15 Feb 2017 21:47:57 +0000 (22:47 +0100)]
radeonsi/gfx9: define and set LS-HS user SGPRs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: set up shader registers for merged LS-HS
Marek Olšák [Wed, 15 Feb 2017 10:57:47 +0000 (11:57 +0100)]
radeonsi/gfx9: set up shader registers for merged LS-HS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: add initial code generation for non-monolithic merged LS-HS
Marek Olšák [Thu, 6 Apr 2017 20:55:06 +0000 (22:55 +0200)]
radeonsi/gfx9: add initial code generation for non-monolithic merged LS-HS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: separate out code for selecting the VS prolog
Marek Olšák [Wed, 19 Apr 2017 23:10:17 +0000 (01:10 +0200)]
radeonsi: separate out code for selecting the VS prolog

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: add si_shader::previous_stage for merged shaders
Marek Olšák [Fri, 7 Apr 2017 19:41:10 +0000 (21:41 +0200)]
radeonsi/gfx9: add si_shader::previous_stage for merged shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: enlarge num_input_sgprs in shader keys due to higher hw limit
Marek Olšák [Thu, 16 Feb 2017 18:36:46 +0000 (19:36 +0100)]
radeonsi/gfx9: enlarge num_input_sgprs in shader keys due to higher hw limit

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: update the summary of shader stage configs
Marek Olšák [Fri, 7 Apr 2017 23:04:56 +0000 (01:04 +0200)]
radeonsi/gfx9: update the summary of shader stage configs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: adjust the signature of si_get_vs_prolog_key
Marek Olšák [Thu, 6 Apr 2017 20:03:07 +0000 (22:03 +0200)]
radeonsi: adjust the signature of si_get_vs_prolog_key

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: separate out VS prolog key generation
Marek Olšák [Thu, 6 Apr 2017 20:55:06 +0000 (22:55 +0200)]
radeonsi: separate out VS prolog key generation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: separate out VS prolog key printing
Marek Olšák [Thu, 6 Apr 2017 20:00:53 +0000 (22:00 +0200)]
radeonsi: separate out VS prolog key printing

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: code shuffling in si_emit_derived_tess_state
Marek Olšák [Fri, 11 Nov 2016 21:37:39 +0000 (22:37 +0100)]
radeonsi: code shuffling in si_emit_derived_tess_state

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: separate out TGSI initialization of si_shader_context
Marek Olšák [Wed, 15 Mar 2017 22:06:59 +0000 (23:06 +0100)]
radeonsi: separate out TGSI initialization of si_shader_context

so that we can put multiple different TGSI shaders into one module.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agost/mesa: use min_index and max_index directly from vbo
Marek Olšák [Tue, 25 Apr 2017 22:28:29 +0000 (00:28 +0200)]
st/mesa: use min_index and max_index directly from vbo

also remove the incorrect comment about primitive restart.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agovbo: set min_index = 0 so gallium can use the value directly
Marek Olšák [Tue, 25 Apr 2017 22:28:05 +0000 (00:28 +0200)]
vbo: set min_index = 0 so gallium can use the value directly

We could also remove index_bounds_valid and use max_index != ~0 instead.
Opinions on that are welcome.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoRevert "glsl: reject image qualifiers with non-image types inside uniform blocks"
Matt Turner [Fri, 28 Apr 2017 19:29:11 +0000 (12:29 -0700)]
Revert "glsl: reject image qualifiers with non-image types inside uniform blocks"

This reverts commit 24011ead71ea9980e6b34e40d9dbd64e6560f5a4.

This causes lots of ES 3.1 CTS tests to fail to compile a bit of code
like:

   layout(binding = 0) buffer InOut
   {
        highp uint inputValues[384];
        highp uint outputValues[384];
        coherent highp uint groupValues[64];      <-----
   } sb_inout;

   error: memory qualifiers may only be applied to images

7 years agost/mesa: add more fallback gallium formats for GL integer formats
Brian Paul [Fri, 28 Apr 2017 02:59:44 +0000 (20:59 -0600)]
st/mesa: add more fallback gallium formats for GL integer formats

The VMware driver has a limited set of integer texture formats.  We
often have to fall back to 4-component formats when 1- or 2-component
formats are missing.

This fixes about 8 integer texture Piglit tests with the VMware driver
on Linux.  We've had this code in-house for a long time but I guess it
was never up-streamed to Mesa master.

This shouldn't regress any other drivers since we're either choosing
an earlier format in the list, or failing anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: optimize color_buffer_writes_enabled()
Brian Paul [Thu, 27 Apr 2017 14:52:30 +0000 (08:52 -0600)]
mesa: optimize color_buffer_writes_enabled()

Return as soon as we find an existing color channel that's enabled for
writing.  Typically, this allows us to return true on the first loop
iteration intead of doing four iterations.

No piglit regressions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agost/mesa: whitespace clean-ups in st_manager.c
Brian Paul [Thu, 27 Apr 2017 15:03:02 +0000 (09:03 -0600)]
st/mesa: whitespace clean-ups in st_manager.c

Trivial.

7 years agoRevert "glsl: set vector_elements to 1 for samplers"
Matt Turner [Fri, 28 Apr 2017 18:48:29 +0000 (11:48 -0700)]
Revert "glsl: set vector_elements to 1 for samplers"

This reverts commit 75a31a20af269c047661af33e28f793269537b79.

This breaks thousands of tests on i965 with malloc corruption.

7 years agoanv: Drop 'x11' prefix from non-X11 WSI funcs
Chad Versace [Mon, 24 Apr 2017 17:32:12 +0000 (10:32 -0700)]
anv: Drop 'x11' prefix from non-X11 WSI funcs

Drop it from x11_anv_wsi_image_create and x11_anv_wsi_image_free. The
functions are used by Wayland WSI too.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
7 years agoanv: Alphabetize KHR extensions
Jason Ekstrand [Fri, 28 Apr 2017 12:02:27 +0000 (05:02 -0700)]
anv: Alphabetize KHR extensions

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
7 years agoac: automake: sort sources list alphabetically
Emil Velikov [Fri, 28 Apr 2017 12:35:18 +0000 (13:35 +0100)]
ac: automake: sort sources list alphabetically

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoac: include all sources in the tarball
Emil Velikov [Fri, 28 Apr 2017 12:33:58 +0000 (13:33 +0100)]
ac: include all sources in the tarball

Fixes: e2659176cef ("radeonsi/ac: move vertex export remove to common code.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
7 years agost/mesa: remove redundant stfb->iface checks
Nicolai Hähnle [Fri, 21 Apr 2017 13:11:34 +0000 (15:11 +0200)]
st/mesa: remove redundant stfb->iface checks

stfb->iface is always non-NULL for an st_framebuffer. These checks
were incorrect, relying on out-of-bounds memory access in the
surface-less case of EGL_KHR_surfaceless_context.

v2: remove redundant stread check (Marek)

Reviewed-by: Marek Olšák <marek@olsak@amd.com> (v2)
7 years agost/mesa: don't cast the incomplete framebufer to st_framebuffer
Nicolai Hähnle [Fri, 21 Apr 2017 13:06:47 +0000 (15:06 +0200)]
st/mesa: don't cast the incomplete framebufer to st_framebuffer

The incomplete framebuffer is set for a surfaceless context. This leads to
the following error in piglit spec@egl_khr_surfaceless_context@viewport:

==26703==ERROR: AddressSanitizer: global-buffer-overflow on address 0x7f6886e43240 at pc 0x7f68854db0fd bp 0x7ffca404b3b0 sp 0x7ffca404b3a0
READ of size 8 at 0x7f6886e43240 thread T0
    #0 0x7f68854db0fc in st_viewport ../../../mesa-src/src/mesa/state_tracker/st_cb_viewport.c:57
    #1 0x556840176cdb in main tests/egl/spec/egl_khr_surfaceless_context/viewport.c:101
    #2 0x7f688edcf3f0 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x203f0)
    #3 0x556840176e19 in _start (/home/nha/amd/piglit/bin/egl-surfaceless-context-viewport+0xe19)

0x7f6886e43240 is located 32 bytes to the left of global variable 'DummyRenderbuffer' defined in '../../../mesa-src/src/mesa/main/fbobject.c:69:31' (0x7f6886e43260) of size 112
0x7f6886e43240 is located 8 bytes to the right of global variable 'IncompleteFramebuffer' defined in '../../../mesa-src/src/mesa/main/fbobject.c:73:30' (0x7f6886e42de0) of size 1112
SUMMARY: AddressSanitizer: global-buffer-overflow ../../../mesa-src/src/mesa/state_tracker/st_cb_viewport.c:57 in st_viewport

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek@olsak@amd.com>
7 years agost/glsl_to_tgsi: make undef_src and undef_dst const
Nicolai Hähnle [Wed, 19 Apr 2017 08:05:33 +0000 (10:05 +0200)]
st/glsl_to_tgsi: make undef_src and undef_dst const

7 years agost/glsl_to_tgsi: cleanup using visit_generic_intrinsic
Nicolai Hähnle [Wed, 19 Apr 2017 08:53:13 +0000 (10:53 +0200)]
st/glsl_to_tgsi: cleanup using visit_generic_intrinsic

It turns out that explicitly setting the writemask isn't actually
needed; emit_asm does the right thing based on looking at the types.

7 years agoglsl: remove the shader_group_vote and shader_ballot expression ops
Nicolai Hähnle [Wed, 19 Apr 2017 08:47:08 +0000 (10:47 +0200)]
glsl: remove the shader_group_vote and shader_ballot expression ops

They are now no longer used.

7 years agoglsl: implement arb_shader_ballot builtins using intrinsics
Nicolai Hähnle [Wed, 19 Apr 2017 08:29:30 +0000 (10:29 +0200)]
glsl: implement arb_shader_ballot builtins using intrinsics

7 years agoglsl: implement arb_shader_group_vote builtins via intrinsics
Nicolai Hähnle [Wed, 19 Apr 2017 08:17:19 +0000 (10:17 +0200)]
glsl: implement arb_shader_group_vote builtins via intrinsics

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agost/glsl_to_tgsi: implement shader_group_vote and shader_ballot intrinsics
Nicolai Hähnle [Wed, 19 Apr 2017 08:08:49 +0000 (10:08 +0200)]
st/glsl_to_tgsi: implement shader_group_vote and shader_ballot intrinsics

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoglsl: add intrinsics for ARB_shader_group_vote and ARB_shader_ballot
Nicolai Hähnle [Wed, 19 Apr 2017 08:08:25 +0000 (10:08 +0200)]
glsl: add intrinsics for ARB_shader_group_vote and ARB_shader_ballot

These operations are currently implemented as IR expressions. However,
they cannot be transformed and moved in the way that other IR
expressions can because they have non-trivial interactions with
control-flow.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoglsl: reject image qualifiers with non-image types inside uniform blocks
Samuel Pitoiset [Wed, 26 Apr 2017 16:50:16 +0000 (18:50 +0200)]
glsl: reject image qualifiers with non-image types inside uniform blocks

Fixes the following ARB_shader_image_load_store tests:

format-layout-with-non-image-type.frag
memory-qualifier-with-non-image-type.frag

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agoglsl: introduce validate_image_qualifier_for_type() helper
Samuel Pitoiset [Wed, 26 Apr 2017 16:50:15 +0000 (18:50 +0200)]
glsl: introduce validate_image_qualifier_for_type() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agoglsl: fix error when using format qualifiers with non-image types
Samuel Pitoiset [Wed, 26 Apr 2017 16:50:14 +0000 (18:50 +0200)]
glsl: fix error when using format qualifiers with non-image types

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agoutil/disk_cache: remove percentage based max cache limit
Timothy Arceri [Fri, 28 Apr 2017 03:05:52 +0000 (13:05 +1000)]
util/disk_cache: remove percentage based max cache limit

The more I think about it the more this seems like a bad idea.
When we were deleting old cache dirs this wasn't so bad as it
was unlikely we would ever hit the actual limit before things
were cleaned up. Now that we only start cleaning up old cache
items once the limit is reached the a percentage based max
cache limit is more risky.

For the inital release of shader cache I think its better to
stick to a more conservative cache limit, at least until we
have some way of cleaning up the cache more aggressively.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
7 years agoanv: Move queues, events, and semaphores to their own file
Jason Ekstrand [Thu, 16 Feb 2017 00:48:47 +0000 (16:48 -0800)]
anv: Move queues, events, and semaphores to their own file

Things are about to get more complicated, especially as far as
semaphores are concerned.

Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agoanv: Implement VK_KHX_external_memory_fd
Jason Ekstrand [Tue, 28 Feb 2017 18:58:40 +0000 (10:58 -0800)]
anv: Implement VK_KHX_external_memory_fd

This commit just exposes the memory handle type.  There's interesting we
need to do here for images.  So long as the user doesn't set any crazy
environment variables such as INTEL_DEBUG=nohiz, all of the compression
formats etc. should "just work" at least for opaque handle types.

v2 (chadv):
  - Rebase.
  - Fix vkGetPhysicalDeviceImageFormatProperties2KHR when
    handleType == 0.
  - Move handleType-independency comments out of handleType-switch, in
    vkGetPhysicalDeviceExternalBufferPropertiesKHX.  Reduces diff in
    future dma_buf patches.

Co-authored-with: Chad Versace <chadversary@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agoanv: Use the BO cache for DeviceMemory allocations
Jason Ekstrand [Tue, 14 Mar 2017 00:20:15 +0000 (17:20 -0700)]
anv: Use the BO cache for DeviceMemory allocations

Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agoanv/allocator: Add a BO cache
Jason Ekstrand [Mon, 13 Mar 2017 23:18:54 +0000 (16:18 -0700)]
anv/allocator: Add a BO cache

This cache allows us to easily ensure that we have a unique anv_bo for
each gem handle.  We'll need this in order to support multiple-import of
memory objects and semaphores.

v2 (Jason Ekstrand):
 - Reject BO imports if the size doesn't match the prime fd size as
   reported by lseek().

Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agoanv: Implement VK_KHX_external_memory
Jason Ekstrand [Wed, 15 Feb 2017 02:57:22 +0000 (18:57 -0800)]
anv: Implement VK_KHX_external_memory

This is the trivial implementation that just exposes the extension
string but exposes zero external handle types.

Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agoanv: Implement VK_KHX_external_memory_capabilities
Chad Versace [Tue, 28 Feb 2017 18:58:31 +0000 (10:58 -0800)]
anv: Implement VK_KHX_external_memory_capabilities

This is a complete but trivial implementation. It's trivial becasue We
support no external memory capabilities yet.  Most of the real work in
this commit is in reworking the UUIDs advertised by the driver.

v2 (chadv):
  - Fix chain traversal in vkGetPhysicalDeviceImageFormatProperties2KHR.
    Extract VkPhysicalDeviceExternalImageFormatInfoKHX from the chain of
    input structs, not the chain of output structs.
  - In vkGetPhysicalDeviceImageFormatProperties2KHR, iterate over the
    input chain and the output chain separately. Reduces diff in future
    dma_buf patches.

Co-authored-with: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoanv/physical_device: Rename uuid to pipeline_cache_uuid
Jason Ekstrand [Mon, 27 Feb 2017 17:36:20 +0000 (09:36 -0800)]
anv/physical_device: Rename uuid to pipeline_cache_uuid

We're about to have more UUIDs for different things so this one really
needs to be properly labeled.

Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agoanv: Refactor device_get_cache_uuid into physical_device_init_uuids
Jason Ekstrand [Mon, 27 Feb 2017 17:34:53 +0000 (09:34 -0800)]
anv: Refactor device_get_cache_uuid into physical_device_init_uuids

Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agoanv: Set EXEC_OBJECT_ASYNC when available
Jason Ekstrand [Thu, 13 Apr 2017 23:30:19 +0000 (16:30 -0700)]
anv: Set EXEC_OBJECT_ASYNC when available

Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agoanv/cmd_buffer: Use the device allocator for QueueSubmit
Jason Ekstrand [Tue, 28 Feb 2017 01:31:05 +0000 (17:31 -0800)]
anv/cmd_buffer: Use the device allocator for QueueSubmit

The command is really operating on a Queue not a command buffer and the
nearest object to that with an allocator is VkDevice.

Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: "17.0 17.1" <mesa-dev@lists.freedesktop.org>
7 years agomesa: remove wip framebuffer code
Timothy Arceri [Thu, 27 Apr 2017 11:07:11 +0000 (21:07 +1000)]
mesa: remove wip framebuffer code

This was added in 34b3b40af97d back in 2006. Seems it wasn't
needed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agoglsl: set vector_elements to 1 for samplers
Samuel Pitoiset [Wed, 26 Apr 2017 11:49:13 +0000 (13:49 +0200)]
glsl: set vector_elements to 1 for samplers

I don't see any reasons why vector_elements is 1 for images and
0 for samplers. This increases consistency and allows to clean
up some code a bit.

This will also help for ARB_bindless_texture.

No piglit regressions with RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoclover: Fix build since clang r301442
Jan Vesely [Thu, 27 Apr 2017 16:11:37 +0000 (12:11 -0400)]
clover: Fix build since clang r301442

v2: rename default_ik -> ik_opencl

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
7 years agodisk_cache: use block size rather than file size
Timothy Arceri [Thu, 27 Apr 2017 01:15:30 +0000 (11:15 +1000)]
disk_cache: use block size rather than file size

The majority of cache files are less than 1kb this resulted in us
greatly miscalculating the amount of disk space used by the cache.

Using the number of blocks allocated to the file is more
conservative and less likely to cause issues.

This change will result in cache sizes being miscalculated further
until old items added with the previous calculation have all been
removed. However I don't see anyway around that, the previous
patch should help limit that problem.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
7 years agodisk_cache: reduce default cache size to 5% of filesystem
Timothy Arceri [Thu, 27 Apr 2017 01:15:29 +0000 (11:15 +1000)]
disk_cache: reduce default cache size to 5% of filesystem

Modern disks are extremely large and are only going to get bigger.
Usage has shown frequent Mesa upgrades can result in the cache
growing very fast i.e. wasting a lot of disk space unnecessarily.

5% seems like a more reasonable default.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
7 years agoradeon/ac: remove assert causing regression
Dave Airlie [Thu, 27 Apr 2017 10:35:56 +0000 (11:35 +0100)]
radeon/ac: remove assert causing regression

This assert wasn't in the original radeonsi code but I added
it without totally understanding the original code, it caused
some regressions in variable-indexing tessellation shaders.

Fixes: e2659176 radeonsi/ac: move vertex export remove to common code.
Reported-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradeon/ac: fix build on llvm 3.8.1
Dave Airlie [Thu, 27 Apr 2017 10:20:25 +0000 (11:20 +0100)]
radeon/ac: fix build on llvm 3.8.1

Add missing include to fix build.

Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agonvc0: Enable compute support for Pascal
Boyan Ding [Sun, 23 Apr 2017 15:19:23 +0000 (23:19 +0800)]
nvc0: Enable compute support for Pascal

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agonvc0: Add new launch descriptor format for GP100
Boyan Ding [Wed, 26 Apr 2017 13:21:58 +0000 (21:21 +0800)]
nvc0: Add new launch descriptor format for GP100

v2:
Also handle the the new format in indirect dispatch
Use compute class check instead of chipset check

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agonvc0: Fix index of unk fields in nve4_cp_launch_desc
Boyan Ding [Sun, 23 Apr 2017 15:19:21 +0000 (23:19 +0800)]
nvc0: Fix index of unk fields in nve4_cp_launch_desc

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agonouveau: Fix indentation of maxwell compute class definitions
Boyan Ding [Sun, 23 Apr 2017 15:19:20 +0000 (23:19 +0800)]
nouveau: Fix indentation of maxwell compute class definitions

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agoanv: Don't place scratch buffers above the 32-bit boundary
Jason Ekstrand [Sat, 22 Apr 2017 22:51:01 +0000 (15:51 -0700)]
anv: Don't place scratch buffers above the 32-bit boundary

This fixes rendering corruptions in DOOM.  Hopefully, it will also make
Jenkins a bit more stable as we've been seeing some random failures and
GPU hangs ever since turning on 48bit.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100620
Fixes: 651ec926fc1 "anv: Add support for 48-bit addresses"
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoradv/ac: eliminate unused vertex shader outputs. (v2)
Dave Airlie [Fri, 21 Apr 2017 02:38:05 +0000 (03:38 +0100)]
radv/ac: eliminate unused vertex shader outputs. (v2)

This is ported from radeonsi, and I can see at least one
Talos shader drops an export due to this, and saves some
VGPR usage.

v2: use shared code.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradeonsi/ac: move vertex export remove to common code.
Dave Airlie [Tue, 25 Apr 2017 22:33:29 +0000 (23:33 +0100)]
radeonsi/ac: move vertex export remove to common code.

This code can be shared by radv, we bump the max to
VARYING_SLOT_MAX here, but that shouldn't have too
much fallout.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv: fix regression in descriptor set freeing.
Dave Airlie [Wed, 26 Apr 2017 23:31:29 +0000 (09:31 +1000)]
radv: fix regression in descriptor set freeing.

Since the host pool changes,

Fixes:
dEQP-VK.api.descriptor_pool.out_of_pool_memory

Fixes: 126d5ad "radv: Use host memory pool for non-freeable descriptors."
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoglsl: remove duplicate validation
Timothy Arceri [Wed, 26 Apr 2017 03:56:45 +0000 (13:56 +1000)]
glsl: remove duplicate validation

Varying types have already been validated in
apply_type_qualifier_to_variable() by this point.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agoglsl: use without_array() rather than get_scalar_type()
Timothy Arceri [Wed, 26 Apr 2017 03:56:44 +0000 (13:56 +1000)]
glsl: use without_array() rather than get_scalar_type()

Here get_scalar_type() was just being use to remove the array
after that we converted it back to base_type anyway so just
use the without_array() helper.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
7 years agosvga: fix vertex buffer binding issue
Brian Paul [Tue, 25 Apr 2017 14:02:28 +0000 (08:02 -0600)]
svga: fix vertex buffer binding issue

When we ran Viewperf11's Maya-03 test 3 we saw warnings about flushing
the command buffer with mapped buffers.  This happened when transitioning
from hardware rendering to a 'draw' fallback path.

The problem is the util_set_vertex_buffers_count() function doesn't do
exactly what we want in svga_hwtnl_vertex_buffers().  In a case such as
dst_count=2, dst={bufA, bufB}, count=1 and src={bufC}, when the function
returns we'll have dst_count=2 and dst={bufC, bufB}.  What we really want
is dst_count=1 and dst={bufC, NULL}.  As it was, we were telling the svga
device that there were two vertex buffers when in fact we really only
needed one for the subsequent drawing command.

In this particular case, we first did hardware drawing with {bufA, bufB}
then we transitioned to the 'draw' module, consuming vertex data from
bufA and bufB and writing the new vertex data to bufC.  bufA and bufB are
mapped for reading when we flush the command buffer but should not be
referenced by the command buffer.  The above change fixes that.

No Piglit regressions.  Also tested with Viewperf, Google Earth, Heaven,
etc.

VMware bug 1842059

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agogallium/util: reduce util_snprintf() calls in debug_flush_might_flush_cb()
Brian Paul [Mon, 24 Apr 2017 18:58:22 +0000 (12:58 -0600)]
gallium/util: reduce util_snprintf() calls in debug_flush_might_flush_cb()

We only need to construct the debug message if the mapped_sync flag is set.
This should make the function faster since the flag is usually false.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agogallium/util: add some comments in u_debug_flush.c
Brian Paul [Mon, 24 Apr 2017 18:57:14 +0000 (12:57 -0600)]
gallium/util: add some comments in u_debug_flush.c

Trivial.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agosvga: Removed the unused label 'done' in svga_validate_surface_view()
Charmaine Lee [Thu, 20 Apr 2017 18:40:00 +0000 (11:40 -0700)]
svga: Removed the unused label 'done' in svga_validate_surface_view()

Trivial fix

7 years agosvga: use the winsys interface to invalidate surface
Charmaine Lee [Thu, 20 Apr 2017 01:34:36 +0000 (18:34 -0700)]
svga: use the winsys interface to invalidate surface

Instead of directly sending the InvalidateGBSurface command,
this patch uses the invalidate_surface interface.

Fixes Linux VM piglit failures including
   ext_texture_array-gen-mipmap, fbo-generatemipmap-array S3TC_DXT1

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agosvga: fix format for screen target
Charmaine Lee [Tue, 18 Apr 2017 22:55:59 +0000 (15:55 -0700)]
svga: fix format for screen target

This patch revises the fix in commit 606f13afa31c9f041a68eb22cc32112ce813f944
to properly translate the surface format for screen target.
Instead of changing the svga format for PIPE_FORMAT_B5G6R5_UNORM
to SVGA3D_R5G6B5 for all texture surfaces, this patch only restricts
SVGA3D_R5G6B5 for screen target surfaces. This avoids rendering
failures when specify a non-vgpu10 format in a vgpu10 context with
software renderer.

Fixes piglit failures spec@!opengl 1.1@draw-pixels,
                      spec@!opengl 1.1@teximage-colors gl_r3_g3_b2
                      spec@!opengl 1.1@texwrap formats

Tested Xorg with 16bits depth.
Also tested with MTT piglit, MTT glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agosvga: cache the backing surface handle in the texture object
Charmaine Lee [Tue, 25 Apr 2017 20:32:59 +0000 (14:32 -0600)]
svga: cache the backing surface handle in the texture object

CinebenchR15 not only binds the same texture for rendering and sampling,
it actually changes the framebuffer buffer attachment very often, causing
a lot of backed surface view to be created and a lot of surface copies
to be done. This patch caches the backed surface handle
in the texture resource and allows the backed surface view to
reuse the backed surface handle.  With this patch, the number of
backed surface view reduces from 1312 to 3. Unfortunately, this
does not eliminate all the surface copies. There are still surface
copies involved when we switch from original to backed surface handle
for rendering.

Tested with CinebenchR15, NobelClinicianViewer, Turbine, Lightsmark2008,
            MTT glretrace, MTT piglit.

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agosvga: Update the backing resource only if needed
Charmaine Lee [Tue, 25 Apr 2017 20:31:04 +0000 (14:31 -0600)]
svga: Update the backing resource only if needed

This patch adds a timestamp in svga_surface structure to keep track
of when the backing surface is last sync with the original resource.
This helps to avoid unnecessary surface copy from the original
resource to the backing surface if the original resource has not
since been modified.

This reduces the amount of surface copy with CinebenchR15.

Tested with CinebenchR15, mtt glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agosvga: Set the surface dirty bit for the right surface view
Charmaine Lee [Thu, 13 Apr 2017 22:12:25 +0000 (15:12 -0700)]
svga: Set the surface dirty bit for the right surface view

For VGPU10, we will render to a backed surface view when
the same resource is used for rendering and sampling.
In this case, we will mark the dirty bit for the backed surface view.

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agosvga: Move rendertarget view related fields to hw_clear state
Charmaine Lee [Tue, 25 Apr 2017 20:27:51 +0000 (14:27 -0600)]
svga: Move rendertarget view related fields to hw_clear state

This patch moves the rendertarget view related fields from
svga_hw_draw_state to svga_hw_clear_state where all the hw
framebuffer related state resides.

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agosvga: Move setting the rendered_to flags to framebuffer emit time
Charmaine Lee [Wed, 12 Apr 2017 23:21:51 +0000 (16:21 -0700)]
svga: Move setting the rendered_to flags to framebuffer emit time

Instead of setting the rendered_to flags at set time, this patch
moves the setting of the flags to framebuffer emit time.

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agosvga: add const qualifiers on svga_check_sampler_view_resource_collision()
Brian Paul [Mon, 10 Apr 2017 21:02:05 +0000 (15:02 -0600)]
svga: add const qualifiers on svga_check_sampler_view_resource_collision()

We don't change any of the argument objects.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agosvga: improve surface view debug messages
Brian Paul [Mon, 10 Apr 2017 19:51:48 +0000 (13:51 -0600)]
svga: improve surface view debug messages

The old ones were somewhat cryptic.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agosvga: add DEBUG_SAMPLERS
Brian Paul [Mon, 10 Apr 2017 19:48:21 +0000 (13:48 -0600)]
svga: add DEBUG_SAMPLERS

The debug output in svga_create_sampler_state() was controlled by
DEBUG_VIEWS but that's not consistent with the other debug output for
sampler views.  Create/use a new debug flag just for this.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agosvga: fail screen creation if HW version is too old
Brian Paul [Thu, 6 Apr 2017 20:55:53 +0000 (14:55 -0600)]
svga: fail screen creation if HW version is too old

Tested by verifying 3D acceleration works with HWv8 but not earlier.
For HWv7 and older we get the GDI Generic renderer.

Reviewed-by: Neha Bhende<bhenden@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agowinsys/svga: fix error path when kernel is not able to create surface
Deepak Rawat [Mon, 3 Apr 2017 15:12:43 +0000 (08:12 -0700)]
winsys/svga: fix error path when kernel is not able to create surface

If for some reason kernel is not able to create surface,
when no buffer was provided the function
vmw_svga_winsys_surface_create should return NULL.

This patch fixes the issue where the code was not following the
clean up path in case of error, which used to cause SIGSEGV.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
7 years agodraw: whitespace fixes in draw_pipe_vbuf.c
Brian Paul [Tue, 25 Apr 2017 00:51:05 +0000 (18:51 -0600)]
draw: whitespace fixes in draw_pipe_vbuf.c

Remove trailing whitespace, fix formatting, etc.  Trivial.

7 years agost/mesa: minor clean-ups in st_update_renderbuffer_surface()
Brian Paul [Fri, 21 Apr 2017 19:46:28 +0000 (13:46 -0600)]
st/mesa: minor clean-ups in st_update_renderbuffer_surface()

Remove unneeded parens.  Add const qualifiers.  Move var decls closer
to where they're used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Neha Bhende<bhenden@vmware.com>
7 years agonv50,nvc0: disable the TGSI merge registers pass
Samuel Pitoiset [Mon, 24 Apr 2017 22:31:49 +0000 (00:31 +0200)]
nv50,nvc0: disable the TGSI merge registers pass

shader-db results on GK106 (Thanks Karol):

total instructions in shared programs : 3931608 -> 3929463 (-0.05%)
total gprs used in shared programs    : 481255 -> 479014 (-0.47%)
total local used in shared programs   : 27481 -> 27381 (-0.36%)
total bytes used in shared programs   : 36031256 -> 36011120 (-0.06%)

                local        gpr       inst      bytes
    helped          14        1471        1309        1309
      hurt           1          88         384         384

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agoradeonsi: disable the TGSI merge registers pass
Samuel Pitoiset [Mon, 24 Apr 2017 22:31:48 +0000 (00:31 +0200)]
radeonsi: disable the TGSI merge registers pass

47109 shaders in 29632 tests
Totals:
SGPRS: 1917364 -> 1916620 (-0.04 %)
VGPRS: 1165802 -> 1165202 (-0.05 %)
Spilled SGPRs: 1880 -> 1843 (-1.97 %)
Spilled VGPRs: 70 -> 65 (-7.14 %)
Private memory VGPRs: 1184 -> 1184 (0.00 %)
Scratch size: 1312 -> 1308 (-0.30 %) dwords per thread
Code Size: 60211356 -> 60192268 (-0.03 %) bytes
LDS: 1077 -> 1077 (0.00 %) blocks
Max Waves: 428597 -> 428674 (0.02 %)
Wait states: 0 -> 0 (0.00 %)

Totals from affected shaders:
SGPRS: 238173 -> 237429 (-0.31 %)
VGPRS: 149556 -> 148956 (-0.40 %)
Spilled SGPRs: 1263 -> 1226 (-2.93 %)
Spilled VGPRs: 25 -> 20 (-20.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 20 -> 16 (-20.00 %) dwords per thread
Code Size: 10457904 -> 10438816 (-0.18 %) bytes
LDS: 50 -> 50 (0.00 %) blocks
Max Waves: 41283 -> 41360 (0.19 %)
Wait states: 0 -> 0 (0.00 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agost/glsl_to_tgsi: disable the merge registers pass conditionally
Samuel Pitoiset [Mon, 24 Apr 2017 22:31:47 +0000 (00:31 +0200)]
st/glsl_to_tgsi: disable the merge registers pass conditionally

The main goal of this pass to merge temporary registers in order
to reduce the total number of registers and also to produce
optimal TGSI code.

In fact, compilers seem to be confused when temporary variables
are already merged, maybe because it's done too early in the
process.

Skipping the pass, reduce both the register pressure and the code
size, at least for Nouveau and RadeonSI because they have a real
backend compiler.

Found by luck while fixing an issue in the TGSI dead code elimination
pass which affects tex instructions with bindless samplers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
Samuel Pitoiset [Mon, 24 Apr 2017 22:31:46 +0000 (00:31 +0200)]
gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: use unsynchronized transfers for shader binary uploads
Samuel Pitoiset [Tue, 25 Apr 2017 22:36:12 +0000 (00:36 +0200)]
radeonsi: use unsynchronized transfers for shader binary uploads

Because the buffer is new, it can't be referenced by any CS.

This can save few CPU cycles by skipping the whole
PIPE_TRANSFER_UNSYNCHRONIZED if in amdgpu_bo_map().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: turn si_shader_key::mono into a non-union
Marek Olšák [Tue, 14 Feb 2017 21:23:04 +0000 (22:23 +0100)]
radeonsi: turn si_shader_key::mono into a non-union

A merged LS-HS shader needs both fix_fetch and inputs_to_copy
for compilation.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: adjust ESGS ring buffer size computation on VI
Marek Olšák [Sat, 22 Apr 2017 12:47:03 +0000 (14:47 +0200)]
radeonsi: adjust ESGS ring buffer size computation on VI

Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: don't set deprecated field PARTIAL_ES_WAVE_ON
Marek Olšák [Sun, 23 Apr 2017 18:29:04 +0000 (20:29 +0200)]
radeonsi/gfx9: don't set deprecated field PARTIAL_ES_WAVE_ON

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: set MAX_PRIMGRP_IN_WAVE in the correct register
Marek Olšák [Sun, 23 Apr 2017 18:14:42 +0000 (20:14 +0200)]
radeonsi/gfx9: set MAX_PRIMGRP_IN_WAVE in the correct register

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: add a workaround for viewing a slice of 3D as a 2D image
Marek Olšák [Sun, 23 Apr 2017 22:01:06 +0000 (00:01 +0200)]
radeonsi/gfx9: add a workaround for viewing a slice of 3D as a 2D image

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: fix 1D array shader images
Marek Olšák [Sun, 23 Apr 2017 21:29:20 +0000 (23:29 +0200)]
radeonsi/gfx9: fix 1D array shader images

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: fix most things wrong with shader images
Marek Olšák [Sun, 23 Apr 2017 21:06:38 +0000 (23:06 +0200)]
radeonsi/gfx9: fix most things wrong with shader images

There are 2 major hw changes:
- The address must always point to the address of level 0. GFX9 tiling
  modes don't allow binding to a non-0 level.
- 3D must always be bound as 3D, because 2D and 3D use entirely different
  tiling modes, and the texture target determines which set of modes is
  used.

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: fix texture buffer objects and image buffers with IDXEN==0
Marek Olšák [Sun, 23 Apr 2017 19:32:22 +0000 (21:32 +0200)]
radeonsi/gfx9: fix texture buffer objects and image buffers with IDXEN==0

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoconfigure: print LDFLAGS alongside CFLAGS & co.
Eric Engestrom [Tue, 25 Apr 2017 20:15:55 +0000 (21:15 +0100)]
configure: print LDFLAGS alongside CFLAGS & co.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agomesa: tidy up left over APPLE_vertex_array_object semantics
Timothy Arceri [Sat, 22 Apr 2017 07:30:27 +0000 (17:30 +1000)]
mesa: tidy up left over APPLE_vertex_array_object semantics

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>