pinmux.git
6 years agoadd wiredef auto-generation
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 06:37:07 +0000 (06:37 +0000)]
add wiredef auto-generation

6 years agomore alteration of wire_defs to make auto-generation easier
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 06:36:47 +0000 (06:36 +0000)]
more alteration of wire_defs to make auto-generation easier

6 years agowire_def whitespace cleanup
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 05:51:23 +0000 (05:51 +0000)]
wire_def whitespace cleanup

6 years agoRevert "more alteration of wire_defs to make auto-generation easier"
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 05:46:58 +0000 (05:46 +0000)]
Revert "more alteration of wire_defs to make auto-generation easier"

This reverts commit c5846936454d7d0e45aa39a4f16064797908e348.

(actually not easier)

6 years agomore alteration of wire_defs to make auto-generation easier
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 05:39:09 +0000 (05:39 +0000)]
more alteration of wire_defs to make auto-generation easier

6 years agore-format wire_def to make it easier to auto-generate
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 05:17:59 +0000 (05:17 +0000)]
re-format wire_def to make it easier to auto-generate

6 years agono longer use *interface_def, spi and jtag remove Bit#(1), is this ok?
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 05:11:25 +0000 (05:11 +0000)]
no longer use *interface_def, spi and jtag remove Bit#(1), is this ok?

6 years agouse auto-generate on interface definitions
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 05:07:01 +0000 (05:07 +0000)]
use auto-generate on interface definitions

6 years agoconsistent naming on io interface
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 05:04:15 +0000 (05:04 +0000)]
consistent naming on io interface

6 years agoupdate pwm to consistent naming convention
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 04:51:59 +0000 (04:51 +0000)]
update pwm to consistent naming convention

6 years agorename twi to consistent naming convention
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 04:49:52 +0000 (04:49 +0000)]
rename twi to consistent naming convention

6 years agocell mux naming convention (forgot to save, whoops)
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 04:39:49 +0000 (04:39 +0000)]
cell mux naming convention (forgot to save, whoops)

6 years agouart naming convention consistency
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 04:39:23 +0000 (04:39 +0000)]
uart naming convention consistency

6 years agono longer need MuxInterface class with consistent naming scheme
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 04:17:18 +0000 (04:17 +0000)]
no longer need MuxInterface class with consistent naming scheme

6 years agorename cell mux to consistent naming scheme
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 04:11:59 +0000 (04:11 +0000)]
rename cell mux to consistent naming scheme

6 years agorename spi to consistent name format
Luke Kenneth Casson Leighton [Thu, 22 Mar 2018 03:48:36 +0000 (03:48 +0000)]
rename spi to consistent name format

6 years agoinvert uart rx/tx generation to match wiredefs and interfacedef
Luke Kenneth Casson Leighton [Wed, 21 Mar 2018 14:11:33 +0000 (14:11 +0000)]
invert uart rx/tx generation to match wiredefs and interfacedef

6 years agopartial conversion to use ifacedef
Luke Kenneth Casson Leighton [Wed, 21 Mar 2018 13:29:38 +0000 (13:29 +0000)]
partial conversion to use ifacedef

6 years agomake mux_interface a Pin/Interface... getting complicated
Luke Kenneth Casson Leighton [Wed, 21 Mar 2018 06:29:44 +0000 (06:29 +0000)]
make mux_interface a Pin/Interface... getting complicated

6 years agoupdated yml files for bitbucket bot
Neel [Wed, 21 Mar 2018 05:11:24 +0000 (10:41 +0530)]
updated yml files for bitbucket bot

6 years agofixed indentation issue while generating wire definitions for TWI
Neel [Wed, 21 Mar 2018 05:03:33 +0000 (10:33 +0530)]
fixed indentation issue while generating wire definitions for TWI

6 years agoadd first auto-generated interface_def (io_interface_def)
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 21:54:28 +0000 (21:54 +0000)]
add first auto-generated interface_def (io_interface_def)

6 years agouse ifacefmt function name consistently
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 21:10:28 +0000 (21:10 +0000)]
use ifacefmt function name consistently

6 years agorename interface format fn
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 21:03:37 +0000 (21:03 +0000)]
rename interface format fn

6 years agouse with to open file
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 17:43:17 +0000 (17:43 +0000)]
use with to open file

6 years agouse with statement on bsv_file
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 17:39:44 +0000 (17:39 +0000)]
use with statement on bsv_file

6 years agoadd linebreak on long line
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 17:38:21 +0000 (17:38 +0000)]
add linebreak on long line

6 years agoadd format function
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 17:35:09 +0000 (17:35 +0000)]
add format function

6 years agowhitespace cleanup (autopep8)
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 17:18:12 +0000 (17:18 +0000)]
whitespace cleanup (autopep8)

6 years agoremove hard-coded interface definitions
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 17:17:53 +0000 (17:17 +0000)]
remove hard-coded interface definitions

6 years agoadd io_interface spec, fix bug where \n was in spec
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 17:09:01 +0000 (17:09 +0000)]
add io_interface spec, fix bug where \n was in spec

6 years agoadd uart interface
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:58:09 +0000 (16:58 +0000)]
add uart interface

6 years agoadd spi interface
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:57:10 +0000 (16:57 +0000)]
add spi interface

6 years agoadd scl interface spec
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:55:06 +0000 (16:55 +0000)]
add scl interface spec

6 years agowhitespace cleanup (autopep8)
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:51:24 +0000 (16:51 +0000)]
whitespace cleanup (autopep8)

6 years agowhitespace cleanup
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:51:00 +0000 (16:51 +0000)]
whitespace cleanup

6 years agodocument Pin class
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:50:34 +0000 (16:50 +0000)]
document Pin class

6 years agoadd sdcard spec-generator
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:47:16 +0000 (16:47 +0000)]
add sdcard spec-generator

6 years agoadd jtag interface, remove inout param
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:37:36 +0000 (16:37 +0000)]
add jtag interface, remove inout param

6 years agoadd Interface class
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:27:53 +0000 (16:27 +0000)]
add Interface class

6 years agoadd io option to Pin
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:12:36 +0000 (16:12 +0000)]
add io option to Pin

6 years agoadd basic test routine for Pin class
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 16:08:50 +0000 (16:08 +0000)]
add basic test routine for Pin class

6 years agoadd pin class for auto-generating interface lines
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 15:55:30 +0000 (15:55 +0000)]
add pin class for auto-generating interface lines

6 years agowhitespace cleanup
Luke Kenneth Casson Leighton [Tue, 20 Mar 2018 11:48:28 +0000 (11:48 +0000)]
whitespace cleanup

6 years agoadding AXI4Lite transactor for now.
Neel [Tue, 20 Mar 2018 09:56:52 +0000 (15:26 +0530)]
adding AXI4Lite transactor for now.

Need to add TileLink support as well later.

6 years agoswitching to python2 and added pep8 auto-sorter to make.
Neel [Tue, 20 Mar 2018 07:32:02 +0000 (13:02 +0530)]
switching to python2 and added pep8 auto-sorter to make.

6 years agoadding support for PWM.
Neel [Mon, 19 Mar 2018 12:01:26 +0000 (17:31 +0530)]
adding support for PWM.

6 years agodefined the user-interface for the memory mapped registers
Neel [Mon, 19 Mar 2018 10:36:56 +0000 (16:06 +0530)]
defined the user-interface for the memory mapped registers

Support is provided to address registers using 8-bit, 16-bit, 32-bit or 64-bit addressing scheme.
Need to add support for a compressed scheme as well.

6 years agodecoupling interfaces for IO and memory mapped registers
Neel [Mon, 19 Mar 2018 02:52:17 +0000 (08:22 +0530)]
decoupling interfaces for IO and memory mapped registers

6 years agoadding support for JTAG pins
Neel [Sat, 17 Mar 2018 09:20:25 +0000 (14:50 +0530)]
adding support for JTAG pins

6 years agoadding support for interface of SD/MMC.
Neel [Tue, 13 Mar 2018 16:44:45 +0000 (22:14 +0530)]
adding support for interface of SD/MMC.

6 years agocheck for pin number consistency.
Neel [Tue, 13 Mar 2018 15:37:58 +0000 (21:07 +0530)]
check for pin number consistency.

see #3.
Added check to see if the user input has screwed up the pin numbering in punmap.txt. This check detects for duplicate assignment to Pins or if some pins are missed out on assignment.

6 years agorenaming params.py to parse.py. Adding checks on input
Neel [Tue, 13 Mar 2018 12:43:35 +0000 (18:13 +0530)]
renaming params.py to parse.py. Adding checks on input

See #3.

Added check to see if muxed lists and dedicated lists do not have any duplciates.  This can simulated by replacing uart1_tx to uart2_tx in pinmap.txt.

6 years agoadding a sample test where certain IOs have differing number of muxes
Neel [Tue, 13 Mar 2018 12:07:12 +0000 (17:37 +0530)]
adding a sample test where certain IOs have differing number of muxes

6 years agomux selection lines for a IO should be log of the number of muxes.
Neel [Tue, 13 Mar 2018 12:06:03 +0000 (17:36 +0530)]
mux selection lines for a IO should be log of the number of muxes.

6 years agoudpated the .gitignore file.
Neel [Tue, 13 Mar 2018 11:16:37 +0000 (16:46 +0530)]
udpated the .gitignore file.

6 years agomaintaining distinct arrays for muxed and dedicated cells
Neel [Tue, 13 Mar 2018 11:13:11 +0000 (16:43 +0530)]
maintaining distinct arrays for muxed and dedicated cells

This allows better structure of code and also handling muxed logic is decoupled from the dedicated pins. Cell mux methods only for muxed IOs is created.
Parsing of pinmap file now happens in params.py
see #1

6 years agofull support for dedicated pins.
Neel [Tue, 13 Mar 2018 06:24:19 +0000 (11:54 +0530)]
full support for dedicated pins.

6 years agocode clean using pep8 and autopep8.
Neel [Mon, 12 Mar 2018 16:34:31 +0000 (22:04 +0530)]
code clean using pep8 and autopep8.

6 years agoadding synthesize attribute to the module and a print statement for pinmux generation.
Neel [Mon, 12 Mar 2018 15:40:39 +0000 (21:10 +0530)]
adding synthesize attribute to the module and a print statement for pinmux generation.

6 years agopartial support for dedicated pins
Neel [Mon, 12 Mar 2018 12:32:00 +0000 (18:02 +0530)]
partial support for dedicated pins

removed unwanted print statements from scripts

6 years agoaddeds i2c (twi) interface and also support for inouts
Neel [Mon, 12 Mar 2018 12:22:19 +0000 (17:52 +0530)]
addeds i2c (twi) interface and also support for inouts

6 years agoMerge remote-tracking branch 'origin/master'
Neel [Mon, 12 Mar 2018 08:08:40 +0000 (13:38 +0530)]
Merge remote-tracking branch 'origin/master'

6 years agosyntax upgrades for python3 and above
Neel [Mon, 12 Mar 2018 08:08:28 +0000 (13:38 +0530)]
syntax upgrades for python3 and above

6 years agoInitial Bitbucket Pipelines configuration
Neel Gala [Mon, 12 Mar 2018 07:55:57 +0000 (07:55 +0000)]
Initial Bitbucket Pipelines configuration

6 years agochange rule names to allow implicit scheduling
Neel [Sun, 11 Mar 2018 17:07:49 +0000 (22:37 +0530)]
change rule names to allow implicit scheduling

When inputs from multiple IO cells drive the same interface/peripheral there needs to be an implicite priority between the rules updating the same wire (going to the interface). The current pinmap in this commit creates the above scenario.
To enable the implicit scheduling the rules names need to be different. This commit ensures this as well
Also currently the ordering is based on the order in which the user provides the two instances. the first instance os uart_rx is given priority over the later instance in the pinmap.txt file.

6 years agoautomated the pinumxing logic
Neel [Sun, 11 Mar 2018 16:43:31 +0000 (22:13 +0530)]
automated the pinumxing logic

Currently it only supports muxing between inputs and outputs. Handling of inouts will have to be done soon.

6 years agoinitial commit with minimal templates
Neel [Sat, 10 Mar 2018 17:17:45 +0000 (22:47 +0530)]
initial commit with minimal templates

6 years agoREADME.md created online with Bitbucket
Neel Gala [Sat, 10 Mar 2018 17:16:11 +0000 (17:16 +0000)]
README.md created online with Bitbucket