| 2020-03-10 |
Giacomo Travaglini | misc: string.join has been removed in python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | python: The new module has been removed in python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Andreas Sandberg | python: Make meta class declarations Python 3 safe
|
commit | commitdiff | tree |
| 2020-03-04 |
Giacomo Travaglini | arch-arm: Remove unused getArmSystem helper
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-04 |
Timothy Hayes | mem-ruby: Minor Ruby Prefetcher fixes
|
commit | commitdiff | tree |
| 2020-03-03 |
Giacomo Travaglini | tests: simple_ruby_test's valid_host is X86 only
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-02 |
Adrian Herrera | dev-arm: Add missing UARTs (PL011) to VExpress_GEM5...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-02 |
Adrian Herrera | dev-arm: Add trusted SP805 to VExpress_GEM5 platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-02 |
Adrian Herrera | dev-arm: Add trusted SRAM memory to VExpress_GEM5 platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-02 |
Adrian Herrera | dev-arm: Add flash0 memory to VExpress_GEM5 platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-28 |
Adrian Herrera | dev-arm: PL031, fix AMBA ID and clock names
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-28 |
Giacomo Travaglini | learning-gem5: Use zero initialization in hello_goodbye...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-25 |
Adrian Herrera | dev-arm: RealView, add support for off-chip memory
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-25 |
Adrian Herrera | dev-arm: default _on_chip_memory on RealView
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-20 |
Giacomo Travaglini | dev-arm: Fix setupBootloader for VExpress_GEM5_V2
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Adrian Herrera | arch-arm: ArmISA::clear, inval TLB cached miscregs
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Adrian Herrera | misc: pass ThreadContext on ISA clear
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Giacomo Travaglini | cpu: Fix vector renaming bug
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Giacomo Travaglini | arch, arch-arm: Use BaseISA in RenameMode interface
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Adrian Herrera | arch-arm: Fix CNTFRQ_EL0 permission bits
|
commit | commitdiff | tree |
| 2020-02-17 |
Giacomo Travaglini | arch-arm: Be more verbose on load/store construction
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-17 |
Giacomo Travaglini | base: Use a int to store fgetc return value
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-17 |
Giacomo Travaglini | arch-arm: Fix ArmKVM build
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-17 |
Giacomo Travaglini | cpu: Mark ExecContext::tcBase() as const
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-13 |
Giacomo Travaglini | ext: Add failure node to JUnit xml file
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-11 |
Giacomo Travaglini | tests,misc: update TESTING.md documentation
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-10 |
Giacomo Travaglini | tests: hello_se using host tag
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-10 |
Giacomo Travaglini | tests: Add --host tag
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-10 |
Giacomo Travaglini | configs: Using VExpress_GEM5_V1 as a default for Options.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-10 |
Giacomo Travaglini | arch-arm: LDTRSW was not marked as unpriviledged
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-06 |
Giacomo Travaglini | tests: Move old quick regressions back into their original set
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-04 |
Adrian Herrera | arch-arm: AArch64 reg access HCR_EL2.E2H filter
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-04 |
Adrian Herrera | arch-arm: reg access permissions highest EL helper
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-04 |
Giacomo Travaglini | arch-arm: Split translateFs to distinguish when MMU...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-31 |
Ciro Santilli | configs: allow fs.py and fs_bigLITTLE.py to work without...
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-31 |
Ciro Santilli | configs: fs.py can take multiple disk images on most...
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-31 |
Ciro Santilli | config: add --bootloader to fs.py and fs_bigLITTLE.py
|
commit | commitdiff | tree |
| 2020-01-31 |
Ciro Santilli | dev-arm: add boot_loader param to RealView setupBootLoader
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-27 |
Adrian Herrera | system-arm: AArch64 boot, init CNTFRQ_EL0
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-23 |
Adrian Herrera | dev-arm: SP805 peripherals in VExpress_GEM5_Base
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-22 |
Adrian Herrera | dev-arm: add Watchdog Module SP805 model
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-22 |
Adrian Herrera | dev-arm: VExpress_GEM5_Base, add refclock 32KHz
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-22 |
Giacomo Travaglini | tests: Fix python line break in m5_exit test
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-21 |
Giacomo Travaglini | tests: Add a timeout to getremotetime
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-21 |
Adrian Herrera | dev-arm: add FixedClock SimObject
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-21 |
Giacomo Travaglini | tests: Adding --bin-path option to select tests bin...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-21 |
Giacomo Travaglini | tests: fs/linux/arm passing M5_PATH via commandline
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-17 |
Timothy Hayes | configs: MESI_Three_level python parameters
|
commit | commitdiff | tree |
| 2020-01-17 |
Timothy Hayes | misc: add Arm build_opts for MESI_Three_Level and MOESI_hammer
|
commit | commitdiff | tree |
| 2020-01-15 |
Adrian Herrera | arch-arm: ELIsInHost, check VHE and SecEL2
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-15 |
Adrian Herrera | arch-arm: Virtualization Host Extensions checking
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-14 |
Adrian Herrera | system-arm: bigLITTLE with VExpress_GEM5_V2 in dtb
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-10 |
Adrian Herrera | dev-arm: VExpress_GEM5_Base, fix daughterboard reference
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-09 |
Giacomo Travaglini | base, gpu-compute: Move gpu AMOs into the generic header
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-08 |
Giacomo Travaglini | arch, base: Move arm AtomicOpFunctor into the generic...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-01-08 |
Giacomo Travaglini | base: Move AtomicOpFunctors to a dedicated header
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-07 |
Gabor Dozsa | cpu: Disable O3CPU value forwarding with write strobes
|
commit | commitdiff | tree |
| 2020-01-07 |
Gabor Dozsa | cpu: Use enums for O3CPU store value forwarding
|
commit | commitdiff | tree |
| 2020-01-07 |
Giacomo Travaglini | system-arm: GICv2/GICv3 have different Distributor...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-07 |
Giacomo Travaglini | system-arm: Rename ARM bootloader source
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-07 |
Giacomo Travaglini | system-arm: Rename ARM bootloader directories
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-07 |
Adrian Herrera | misc: Reflect changes of arm bootloader name
|
commit | commitdiff | tree |
| 2020-01-06 |
Adrian Herrera | arch-arm: Semihosting, specify files root dir
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-06 |
Michiel van Tol | dev-arm: Fix SMMUv3 walkMasks in page table ops
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-06 |
Giacomo Travaglini | dev-arm: Fix SMMUv3 16KB next-level table address masking
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-06 |
Adrian Herrera | dev-arm: GICv3, handle GICR_ICFGR0 WI behaviour
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-06 |
Adrian Herrera | configs-arm: enable PMU instantiation in CpuCluster
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-01-03 |
Giacomo Gabrielli | cpu: Fix issue with MinorCPU predicated-false mem....
|
commit | commitdiff | tree |
| 2020-01-03 |
Gabor Dozsa | cpu: Disable MinorCPU value forwarding with write strobes
|
commit | commitdiff | tree |
| 2019-12-23 |
Giacomo Travaglini | tests: Always print stderr in gem5 Fixtures
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-20 |
Giacomo Travaglini | configs: arm realview(64) regressions using VExpress_GEM5_V1
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-18 |
Adrian Herrera | arch-arm: Semihosting, fix SYS_FLEN
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-18 |
Adrian Herrera | sim: kernelExtras optional load addresses
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-18 |
Adrian Herrera | python: fix "fatal" usage in fdthelper
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-18 |
Adrian Herrera | arch-arm: Secure EL2 checking
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-18 |
Adrian Herrera | arch-arm: AArch64 trap check, arbitrary ECs/Imms
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-16 |
Adrian Herrera | sim: kernelExtras if no kernel provided
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-11 |
Giacomo Travaglini | arch-arm: Always initialize SVE memData
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-11 |
Giacomo Travaglini | arch-arm: Avoid creating an empty byteEnable vector
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-11 |
Giacomo Travaglini | cpu: Replace empty byteEnable check with Request::isMasked
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-11 |
Giacomo Travaglini | cpu: Fix coding style (byteEnable->byte_enable)
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-11 |
Giacomo Travaglini | cpu: Add byteEnable assertions to readMem and initateMemRead
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-10 |
Adrian Herrera | dev-arm: GenericTimer, configurable base and low freqs
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-10 |
Adrian Herrera | dev-arm: GenericTimer, freq as 32-bit value
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-10 |
Giacomo Travaglini | arch-arm: Disambuiguate NumFloatV7ArchRegs usage
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-10 |
Giacomo Travaglini | arch-arm: Unify VLdmStm behaviour when reg out of index
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-10 |
Giacomo Travaglini | arch-arm: Fix NumVecV7ArchRegs value (64->16)
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-10 |
Giacomo Travaglini | arch-arm: Reorder arch/arm/registers.hh constants
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-10 |
Giacomo Travaglini | arch-arm: Replace NumFloatV8ArchRegs with NumVecV8ArchRegs
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-09 |
Giacomo Travaglini | tests: AArch64 Linux as quick regressions (instead...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-09 |
Giacomo Travaglini | mem: Add Request::isMasked to check for byte strobing
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-09 |
Giacomo Travaglini | mem: Add byteEnable copy to Request copy constructor
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-12-03 |
Giacomo Travaglini | sim-se: Avoid function overloading for syscall implementation
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-11-28 |
Adrian Herrera | dev-arm: device name in AmbaFake accesses
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-11-27 |
Giacomo Travaglini | base, python: Allow dirname selection for the interpreter
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-11-27 |
Giacomo Travaglini | configs: Add --redirects for syscall emulation
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-11-27 |
Giacomo Travaglini | base: Fix DPRINTF_UNCONDITIONAL on gem5.fast
|
commit | commitdiff | tree |
| 2019-11-27 |
Giacomo Travaglini | configs: Add root redirect path in SE mode only when set
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-11-27 |
Giacomo Travaglini | sim-se: Check Path redirection when mmapping
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2019-11-27 |
Giacomo Travaglini | configs: Fix baremetal platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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