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util: Port git hooks to python3
2020-05-06
Giacomo Travaglini
util: Port git hooks to python3
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-28
Giacomo Travaglini
configs: Do not require args.kernel to be set in baremetal.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-28
Giacomo Travaglini
sim, arch-arm: Restore capability of running without...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-27
Giacomo Travaglini
arch-arm: SVE instructions do not use AHP format
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-27
Giacomo Travaglini
arch-arm: Do not increment exponent if FPSCR.FZ in...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-23
Giacomo Travaglini
configs: Use workloads.py in baremetal.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-23
Giacomo Travaglini
configs: Produce list of workload types in workloads.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-23
Giacomo Travaglini
configs: Add an example workloads module
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-21
Giacomo Travaglini
configs: Add --machine-type option to baremetal.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-21
Giacomo Travaglini
configs: Add --semi-path option to baremetal.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-19
Giacomo Travaglini
arch-sparc: MAP_32BIT does not exist on solaris
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-15
Giacomo Travaglini
tests: Run realview(64) tests with VExpress_GEM5_Foundation
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-15
Giacomo Travaglini
arch-arm: Override ISA::takeOverFrom for the Arm ISA
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-15
Giacomo Travaglini
arch, cpu: Add a takeOverFrom method for switching...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-15
Giacomo Travaglini
arch-arm: Remove unnecessary haveGICv3CPUInterface
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-14
Giacomo Travaglini
tests: Fail checkpoint regressions if no cpt has been...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-14
Giacomo Travaglini
tests: Reduce checkpoint interval used by realview...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-14
Giacomo Travaglini
dev-arm: Fix checkpointing for the GenericTimer
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-14
Giacomo Travaglini
arch-arm: Handle empty object_file scenario in ArmFsWorkload
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-06
Giacomo Travaglini
arch-arm: CNTHCTL trap to EL2 only if ARMv8.6-ECV implemented
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-04-01
Giacomo Travaglini
configs: Enabling SimObj CLI for baremetal platform
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-30
Giacomo Travaglini
dev-arm: Fix pci_mem_base setting in VExpress_GEM5_Base
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-26
Giacomo Travaglini
dev-arm: Don't use args and kwargs on attachIO
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-25
Giacomo Travaglini
configs: Use ArmFsWorkload for Arm baremetal
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-25
Giacomo Travaglini
configs: Initialize atags_addr in baremetal.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-25
Giacomo Travaglini
configs: Enable Semihosting for baremetal.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-25
Giacomo Travaglini
configs: Make --disk-image optional in baremetal.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-24
Giacomo Travaglini
arch-arm: Make load_addr_mask=0 for ArmFsLinux only
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-24
Giacomo Travaglini
arch-arm: Fix aapcs32/aapcs64 compilation issues
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-23
Giacomo Travaglini
dev-arm: Add flash1 memory to VExpress_GEM5 platform
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-19
Giacomo Travaglini
tests: Add --bin-path option to insttest regressions
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-19
Giacomo Travaglini
arch-arm: Fix ArmSystem::_resetAddr evalutation
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-16
Giacomo Travaglini
power: Fix regStats for PowerModel and PowerModelState
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
arch-x86: Add Python 3 workarounds for long
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
arch-x86: Fix imports for Python 3 compatibility
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
tests: Use relative path for python3 compliance
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
arch: list.sort() sorting by key only in python3
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
dev-arm: Fix VExpressFastmodel.py indentation
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
arch: Convert exec keyword to exec() function
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
arch: Bring closure out of p_global_let
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
misc: Make exception handling python3 compliant
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
misc: Text vs Byte string in python3
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
scons: file removed from python3
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
misc: Views and Iterators instead of Lists in python3
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-13
Giacomo Travaglini
arch-arm: Fix Arch detection in FS if there is not...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-10
Giacomo Travaglini
arch-arm: Remove unnecessary RegIndex set for VSTR...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-10
Giacomo Travaglini
arch-arm: Hint the compiler to inline getArmSystem
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-10
Giacomo Travaglini
arch-arm: Speedup ARM execution by avoiding expensive...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-10
Giacomo Travaglini
arch-arm: python3 "/" will always produce a float
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-10
Giacomo Travaglini
misc: Replace basestring with six.string_types
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-10
Giacomo Travaglini
misc: Replace __metaclass__ with six.add_metaclass
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-10
Giacomo Travaglini
misc: string.join has been removed in python3
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-10
Giacomo Travaglini
python: The new module has been removed in python3
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-04
Giacomo Travaglini
arch-arm: Remove unused getArmSystem helper
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-03-03
Giacomo Travaglini
tests: simple_ruby_test's valid_host is X86 only
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-28
Giacomo Travaglini
learning-gem5: Use zero initialization in hello_goodbye...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-20
Giacomo Travaglini
dev-arm: Fix setupBootloader for VExpress_GEM5_V2
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-19
Giacomo Travaglini
cpu: Fix vector renaming bug
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-19
Giacomo Travaglini
arch, arch-arm: Use BaseISA in RenameMode interface
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-17
Giacomo Travaglini
arch-arm: Be more verbose on load/store construction
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-17
Giacomo Travaglini
base: Use a int to store fgetc return value
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-17
Giacomo Travaglini
arch-arm: Fix ArmKVM build
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-17
Giacomo Travaglini
cpu: Mark ExecContext::tcBase() as const
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-13
Giacomo Travaglini
ext: Add failure node to JUnit xml file
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-11
Giacomo Travaglini
tests,misc: update TESTING.md documentation
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-10
Giacomo Travaglini
tests: hello_se using host tag
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-10
Giacomo Travaglini
tests: Add --host tag
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-10
Giacomo Travaglini
configs: Using VExpress_GEM5_V1 as a default for Options.py
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-10
Giacomo Travaglini
arch-arm: LDTRSW was not marked as unpriviledged
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-06
Giacomo Travaglini
tests: Move old quick regressions back into their original set
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-02-04
Giacomo Travaglini
arch-arm: Split translateFs to distinguish when MMU...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-22
Giacomo Travaglini
tests: Fix python line break in m5_exit test
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-21
Giacomo Travaglini
tests: Add a timeout to getremotetime
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-21
Giacomo Travaglini
tests: Adding --bin-path option to select tests bin...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-21
Giacomo Travaglini
tests: fs/linux/arm passing M5_PATH via commandline
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-09
Giacomo Travaglini
base, gpu-compute: Move gpu AMOs into the generic header
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-08
Giacomo Travaglini
arch, base: Move arm AtomicOpFunctor into the generic...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-08
Giacomo Travaglini
base: Move AtomicOpFunctors to a dedicated header
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-07
Giacomo Travaglini
system-arm: GICv2/GICv3 have different Distributor...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-07
Giacomo Travaglini
system-arm: Rename ARM bootloader source
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-07
Giacomo Travaglini
system-arm: Rename ARM bootloader directories
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2020-01-06
Giacomo Travaglini
dev-arm: Fix SMMUv3 16KB next-level table address masking
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-23
Giacomo Travaglini
tests: Always print stderr in gem5 Fixtures
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-20
Giacomo Travaglini
configs: arm realview(64) regressions using VExpress_GEM5_V1
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-11
Giacomo Travaglini
arch-arm: Always initialize SVE memData
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-11
Giacomo Travaglini
arch-arm: Avoid creating an empty byteEnable vector
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-11
Giacomo Travaglini
cpu: Replace empty byteEnable check with Request::isMasked
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-11
Giacomo Travaglini
cpu: Fix coding style (byteEnable->byte_enable)
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-11
Giacomo Travaglini
cpu: Add byteEnable assertions to readMem and initateMemRead
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-10
Giacomo Travaglini
arch-arm: Disambuiguate NumFloatV7ArchRegs usage
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-10
Giacomo Travaglini
arch-arm: Unify VLdmStm behaviour when reg out of index
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-10
Giacomo Travaglini
arch-arm: Fix NumVecV7ArchRegs value (64->16)
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-10
Giacomo Travaglini
arch-arm: Reorder arch/arm/registers.hh constants
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-10
Giacomo Travaglini
arch-arm: Replace NumFloatV8ArchRegs with NumVecV8ArchRegs
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-09
Giacomo Travaglini
tests: AArch64 Linux as quick regressions (instead...
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-09
Giacomo Travaglini
mem: Add Request::isMasked to check for byte strobing
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-09
Giacomo Travaglini
mem: Add byteEnable copy to Request copy constructor
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-12-03
Giacomo Travaglini
sim-se: Avoid function overloading for syscall implementation
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-11-27
Giacomo Travaglini
base, python: Allow dirname selection for the interpreter
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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2019-11-27
Giacomo Travaglini
configs: Add --redirects for syscall emulation
Signed-off-by:
Giacomo Travaglini
<giacomo.travaglini@arm.com>
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