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docs: Mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as done for i965/hsw+
2017-01-05 Iago Toral Quirogadocs: Mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as...
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2017-01-05 Iago Toral Quirogadocs: add GL_ARB_gpu_shader_fp64 and OpenGL 4.0 support...
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2017-01-05 Iago Toral Quirogai965: add a kernel_features bitfield to intel screen
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2017-01-05 Iago Toral Quirogai965/gen7: Enable OpenGL 4.0 in Haswell when supported
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2017-01-05 Iago Toral Quirogai965: get rid of brw->can_do_pipelined_register_writes
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2017-01-04 Iago Toral Quirogai965: remove brw_context dependency from intel_batchbuffer_i...
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2017-01-04 Iago Toral Quirogai965: make intel_batchbuffer_free() take a batchbuffer...
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2017-01-04 Iago Toral Quirogai965: make intel_batchbuffer_emit_dword() take a batchbuffer...
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2017-01-04 Iago Toral Quirogai965: Make intel_bachbuffer_reloc() take a batchbuffer...
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2017-01-03 Iago Toral Quirogai965/vec4: enable ARB_gpu_shader_fp64 for Haswell
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2017-01-03 Iago Toral Quirogai965/vec4: adjust spilling costs for 64-bit registers.
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2017-01-03 Iago Toral Quirogai965/vec4: prevent spilling of DOUBLE_TO_SINGLE destination
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2017-01-03 Iago Toral Quirogai965/vec4: avoid spilling of registers that mix 32...
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2017-01-03 Iago Toral Quirogai965/vec4: support basic spilling of 64-bit registers
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2017-01-03 Iago Toral Quirogai965/vec4: run scalarize_df() after spilling
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2017-01-03 Iago Toral Quirogai965/vec4: prevent src/dst hazards during 64-bit register...
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2017-01-03 Iago Toral Quirogai965/vec4/scalarize_df: support more swizzles via vstride=0
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2017-01-03 Iago Toral Quirogai965/vec4/scalarize_df: do not scalarize swizzles that...
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2017-01-03 Iago Toral Quirogai965/vec4: split instructions that read 64-bit interleaved...
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2017-01-03 Iago Toral Quirogai965/vec4: dump subnr for FIXED_GRF
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2017-01-03 Iago Toral Quirogai965/vec4/tes: consider register offsets during attribute...
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2017-01-03 Iago Toral Quirogai965/vec4/tes: fix setup_payload() for 64bit data types
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2017-01-03 Iago Toral Quirogai965/vec4/tes: fix input loading for 64bit data types
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2017-01-03 Iago Toral Quirogai965/vec4/tcs: fix outputs for 64-bit data
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2017-01-03 Iago Toral Quirogai965/vec4/tcs: fix input loading for 64-bit data
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2017-01-03 Iago Toral Quirogai965/vec4: fix store output for 64-bit types
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2017-01-03 Iago Toral Quirogai965/vec4: fix attribute setup for doubles
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2017-01-03 Iago Toral Quirogai965/vec4: fix indentation in lower_attributes_to_hw_regs()
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2017-01-03 Iago Toral Quirogai965/vec4: make emit_pull_constant_load support 64...
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2017-01-03 Iago Toral Quirogai965/vec4: fix move_push_constants_to_pull_constants...
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2017-01-03 Iago Toral Quirogai965/vec4: fix indentation in move_push_constants_to_pull_co...
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2017-01-03 Iago Toral Quirogai965/vec4: fix move_uniform_array_access_to_pull_constant...
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2017-01-03 Iago Toral Quirogai965/vec4: fix scratch writes for 64bit data
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2017-01-03 Iago Toral Quirogai965/vec4: fix scratch reads for 64bit data
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2017-01-03 Iago Toral Quirogai965/vec4: fix scratch offset for 64bit data
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2017-01-03 Iago Toral Quirogai965/vec4: do not split scratch read/write opcodes
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2017-01-03 Iago Toral Quirogai965/vec4: Do not use DepCtrl with 64-bit instructions
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2017-01-03 Iago Toral Quirogai965/vec4: extend the DWORD multiply DepCtrl restriction...
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2017-01-03 Iago Toral Quirogai965/vec4: don't propagate single-precision uniforms...
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2017-01-03 Iago Toral Quirogai965/vec4: Prevent copy propagation from violating...
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2017-01-03 Iago Toral Quirogai965/vec4: prevent copy-propagation from values with...
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2017-01-03 Iago Toral Quirogai965/vec4: Fix SSBO stores for 64-bit data
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2017-01-03 Iago Toral Quirogai965/vec4: Fix SSBO loads for 64-bit data
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2017-01-03 Iago Toral Quirogai965/vec4: Fix UBO loads for 64-bit data
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2017-01-03 Iago Toral Quirogai965/vec4: Add a shuffle_64bit_data helper
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2017-01-03 Iago Toral Quirogai965/vec4: support multiple dispatch widths and groups...
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2017-01-03 Iago Toral Quirogai965/vec4: Lower 64-bit MAD
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2017-01-03 Iago Toral Quirogai965/vec4/nir: do not emit 64-bit MAD
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2017-01-03 Iago Toral Quirogai965/vec4: Skip swizzle to subnr in 3src instructions...
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2017-01-03 Iago Toral Quirogai965/vec4: fix indentation in pack_uniform_registers
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2017-01-03 Iago Toral Quirogai965/vec4: fix pack_uniform_registers for doubles
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2017-01-03 Iago Toral Quirogai965/vec4: teach register coalescing about 64-bit
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2017-01-03 Iago Toral Quirogai965/disasm: fix subreg for dst in Align16 mode
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2017-01-03 Iago Toral Quirogai965/vec4: implement access to DF source components Z/W
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2017-01-03 Iago Toral Quirogai965/vec4: translate 64-bit swizzles to 32-bit
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2017-01-03 Iago Toral Quirogai965/vec4: add a scalarization pass for double-precision...
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2017-01-03 Iago Toral Quirogai965/vec4: split double-precision SEL
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2017-01-03 Iago Toral Quirogai965/vec4: teach cmod propagation about different execution...
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2017-01-03 Iago Toral Quirogai965/vec4: teach CSE about exec_size, group and doubles
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2017-01-03 Iago Toral Quirogai965/disasm: print NibCtrl for instructions with execsize < 8
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2017-01-03 Iago Toral Quirogai965/vec4: dump NibCtrl for instructions with execsize...
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2017-01-03 Iago Toral Quirogai965/vec4: make the generator set correct NibCtrl for...
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2017-01-03 Iago Toral Quirogai965/vec4: add a SIMD lowering pass
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2017-01-03 Iago Toral Quirogai965: move the group field from fs_inst to backend_instruction.
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2017-01-03 Iago Toral Quirogai965/vec4: add a horiz_offset() helper
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2017-01-03 Iago Toral Quirogai965/vec4: dump the instruction execution size
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2017-01-03 Iago Toral Quirogai965/vec4: use the IR's execution size
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2017-01-03 Iago Toral Quirogai965/vec4: fix regs_read() for doubles
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2017-01-03 Iago Toral Quirogai965/vec4: fix size_written for doubles
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2017-01-03 Iago Toral Quirogai965: move exec_size from fs_instruction to backend_instruction
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2017-01-03 Iago Toral Quirogai965/vec4: add a helper function to create double immediates
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2017-01-03 Iago Toral Quirogai965/vec4: fix optimize predicate for doubles
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2017-01-03 Iago Toral Quirogai965/vec4: implement fsign() for doubles
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2017-01-03 Iago Toral Quirogai965/vec4: implement d2b
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2017-01-03 Iago Toral Quirogai965/vec4: implement d2i, d2u, i2d and u2d
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2017-01-03 Iago Toral Quirogai965/vec4: implement HW workaround for align16 double...
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2017-01-03 Iago Toral Quirogai965/vec4: add helpers for conversions to/from doubles
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2017-01-03 Iago Toral Quirogai965/vec4: Rename DF to/from F generator opcodes
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2017-01-03 Iago Toral Quirogai965/vec4: fix register allocation for 64-bit undef...
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2017-01-03 Iago Toral Quirogai965/vec4: make opt_vector_float ignore doubles
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2017-01-03 Iago Toral Quirogai965/vec4: fix get_nir_dest() to use DF type for 64...
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2017-01-03 Iago Toral Quirogai965/vec4: fix indentation in get_nir_src()
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2017-01-03 Iago Toral Quirogai965/vec4/nir: implement double comparisons
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2017-01-03 Iago Toral Quirogai965/vec4: implement double packing
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2017-01-03 Iago Toral Quirogai965/vec4: implement double unpacking
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2017-01-03 Iago Toral Quirogai965/vec4: don't copy propagate vector opcodes that...
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2017-01-03 Iago Toral Quirogai965/vec4: Fix DCE for VEC4_OPCODE_SET_{LOW,HIGH}_32BIT
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2017-01-03 Iago Toral Quirogai965/vec4: add VEC4_OPCODE_SET_{LOW,HIGH}_32BIT opcodes
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2017-01-03 Iago Toral Quirogai965/vec4: add VEC4_OPCODE_PICK_{LOW,HIGH}_32BIT opcodes
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2017-01-03 Iago Toral Quirogai965/vec4: add dst_null_df()
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2017-01-03 Iago Toral Quirogai965/vec4: We only support 32-bit integer ALU operations...
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2017-01-03 Iago Toral Quirogai965/disasm: align16 DF source regions have a width...
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2017-01-03 Iago Toral Quirogai965/vec4: set correct register regions for 32-bit...
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2017-01-03 Iago Toral Quirogai965/vec4: translate d2f/f2d
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2017-01-03 Iago Toral Quirogai965/vec4: add double/float conversion pseudo-opcodes
Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
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2017-01-03 Iago Toral Quirogai965/vec4/nir: fix emitting 64-bit immediates
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2017-01-03 Iago Toral Quirogai965/vec4/nir: support doubles in ALU operations
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2017-01-03 Iago Toral Quirogai965/vec4/nir: Add bit-size information to types
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2016-12-15 Iago Toral Quiroganir/lower_tex: fix number of components in replace_gradient_...
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2016-12-13 Iago Toral Quiroganir/lower_tex: lower gradients on shadow cube maps...
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