projects / mesa.git / search
| 2019-12-16 | Alyssa Rosenzweig | pan/midgard: Set r1.w magic Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-16 | Alyssa Rosenzweig | pan/midgard: Fix liveness analysis with multiple epilogues Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-16 | Alyssa Rosenzweig | pan/midgard: Writeout per render target Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-16 | Alyssa Rosenzweig | pan/midgard: Add schedule barrier after fragment writeout Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-16 | Alyssa Rosenzweig | panfrost: Pass blend RT number through Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | ci: Remove T760/T860 from CI temporarily Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Report GPU name in es2_info Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Add panfrost_model_name helper Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Move property queries to _encoder Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Move nir_undef_to_zero to Midgard compiler Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | pandecode: Add cast Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Pass size to panfrost_batch_get_scratchpad Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Calculate maximum stack_size per batch Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | pan/midgard: Handle misc. cppcheck warnings Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | pan/midgard: Remove unused ld/st packing hepers Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Handle minor cppcheck issues Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Emit SFBD/MFBD after a batch, instead of... Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Route stack_size from compiler Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Query core count and thread tls alloc Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-13 | Alyssa Rosenzweig | panfrost: Factor out panfrost_query_raw Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | panfrost: Add routines to calculate stack size/shift Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | panfrost: Split stack_shift nibble from unk0 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | panfrost: Rename unknown_address_0 -> scratchpad Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | panfrost: Describe thread local storage sizing rules Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Fix shift for TLS access Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Simplify and fix vector copyprop Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Don't try to free NULL in LCRA Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Force alignment for csel_v Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Don't use no_spill for memory spill src Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Use no_spill bitmask Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Dynamically allocate r26/27 for spills Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Remove code marked "TODO: remove me" Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Remove consecutive_skip code Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Move bounds checking into LCRA Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Remove spill cost heuristic Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Simplify spillability test Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Split spill node selection/spilling Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-12 | Alyssa Rosenzweig | pan/midgard: Move spilling code out of scheduler Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-09 | Alyssa Rosenzweig | gallium/util: Support POLYGON in u_stream_outputs_for_vertices Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-06 | Alyssa Rosenzweig | panfrost: Rename SET_VALUE to WRITE_VALUE Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-06 | Alyssa Rosenzweig | panfrost: Update SET_VALUE with information from igt Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-03 | Alyssa Rosenzweig | panfrost: Remove blend shader hack Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-03 | Alyssa Rosenzweig | gitlab-ci: Remove non-default skips from Panfrost Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-03 | Alyssa Rosenzweig | pan/midgard: Splatter on fragment out Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-03 | Alyssa Rosenzweig | panfrost: Simplify draw_flags Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-03 | Alyssa Rosenzweig | panfrost: Implement pan_tiler for non-hierarchy GPUs Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-12-03 | Alyssa Rosenzweig | panfrost: Add information about T720 tiling Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-22 | Alyssa Rosenzweig | pan/midgard: Use lower_tex_without_implicit_lod Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-22 | Alyssa Rosenzweig | panfrost: Add lcra.c to Android.mk Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-22 | Alyssa Rosenzweig | pan/midgard: Enable LOD lowering only on buggy chips Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-22 | Alyssa Rosenzweig | pan/midgard: Describe quirk MIDGARD_BROKEN_LOD Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-22 | Alyssa Rosenzweig | pan/midgard: Add LOD bias/clamp lowering Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-22 | Alyssa Rosenzweig | pan/midgard: Implement load_sampler_lod_paramaters_pan Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-22 | Alyssa Rosenzweig | nir: Add load_sampler_lod_paramaters_pan intrinsic Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-21 | Alyssa Rosenzweig | panfrost: Add the lod_bias field Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-20 | Alyssa Rosenzweig | pan/midgard: Introduce quirks checks Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-19 | Alyssa Rosenzweig | panfrost: Set PIPE_COMPUTE_CAP_ADDRESS_BITS to 64 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-19 | Alyssa Rosenzweig | panfrost: Disable tiling for GLOBAL resources Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-19 | Alyssa Rosenzweig | panfrost: Pass kernel inputs as uniforms Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-19 | Alyssa Rosenzweig | panfrost: Stub out clover callbacks Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-18 | Alyssa Rosenzweig | pan/midgard: Use shader stage in mir_op_computes_derivative Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-18 | Alyssa Rosenzweig | pan/midgard: Represent ld/st offset unpacked Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-18 | Alyssa Rosenzweig | pan/midgard: Fix masks/alignment for 64-bit loads Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-18 | Alyssa Rosenzweig | pan/midgard: Expose more typesize helpers Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-18 | Alyssa Rosenzweig | pan/midgard: Implement non-aligned UBOs Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Use generic constant packing for 8/64-bit Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Pack 64-bit swizzles Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Fix mir_round_bytemask_down for !32b Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Implement i2i64 and u2u64 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Expand 64-bit writemasks Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Prioritize texture registers Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Disassemble with old pipeline always on... Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Use texture, not textureLod, on early... Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Fix vertex texturing on early Midgard Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-15 | Alyssa Rosenzweig | pan/midgard: Generalize texture registers across GPUs Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-14 | Alyssa Rosenzweig | pan/midgard: Fix copypropagation for textures Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-14 | Alyssa Rosenzweig | pan/midgard: Copypropagate vector creation Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-14 | Alyssa Rosenzweig | pan/lcra: Use Chaitin's spilling heuristic Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-14 | Alyssa Rosenzweig | pan/midgard: Compute spill costs Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-13 | Alyssa Rosenzweig | pan/midgard: Remove util/ra support Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-13 | Alyssa Rosenzweig | pan/midgard: Integrate LCRA Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-13 | Alyssa Rosenzweig | pan/midgard: Implement linearly-constrained register... Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-13 | Alyssa Rosenzweig | pan/midgard: Add blend shader selection bits for MRT Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-11 | Alyssa Rosenzweig | panfrost: Select format-specific blending intrinsics Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-11 | Alyssa Rosenzweig | pan/midgard: Pack load/store masks Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-11 | Alyssa Rosenzweig | pan/midgard: Implement nir_intrinsic_load_output_u8_as_fp16_pan Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-11 | Alyssa Rosenzweig | pan/midgard: Identify ld_color_buffer_u8_as_fp16* Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-11 | Alyssa Rosenzweig | nir: Add load_output_u8_as_fp16_pan intrinsic Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-08 | Alyssa Rosenzweig | pan/midgard: Switch base for vertex texturing on T720 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-08 | Alyssa Rosenzweig | pan/midgard: Pass shader stage to disassembler Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-08 | Alyssa Rosenzweig | pan/midgard: Disassemble half-steps correctly Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-08 | Alyssa Rosenzweig | pan/midgard: Fix printing of half-registers in texture ops Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-04 | Alyssa Rosenzweig | panfrost/ci: Update T760 expectations Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-04 | Alyssa Rosenzweig | pan/midgard: Extend default_phys_reg to !32-bit Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-04 | Alyssa Rosenzweig | pan/midgard: Extend swizzle packing for vec4/16-bit Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-04 | Alyssa Rosenzweig | pan/midgard: Extend offset_swizzle to non-32-bit Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-04 | Alyssa Rosenzweig | pan/midgard: offset_swizzle doesn't need dstsize Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-04 | Alyssa Rosenzweig | pan/midgard: Add bizarre corner case Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-04 | Alyssa Rosenzweig | pan/midgard: Compute bundle interference Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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| 2019-11-04 | Alyssa Rosenzweig | pan/midgard: Fix quadword_count handling Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
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