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cpu: Fix Checker register index use
2013-11-15 Andreas Hanssoncpu: Fix Checker register index use
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2013-11-01 Andreas Hanssonstats: Bump stats to match DRAM controller changes
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2013-11-01 Andreas Hanssonmem: Fixes for DRAM stats accounting
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2013-11-01 Andreas Hanssonmem: Fix the LPDDR3 page size
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2013-11-01 Andreas Hanssonmem: Add a simple adaptive version of the open-page...
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2013-11-01 Andreas Hanssonmem: Add tRRD as a timing parameter for the DRAM controller
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2013-11-01 Andreas Hanssonmem: Less conservative tRAS in DRAM configurations
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2013-11-01 Andreas Hanssonmem: Pick the next DRAM request based on bank availability
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2013-11-01 Andreas Hanssonstats: Bump stats after shifting to SimpleMemory
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2013-11-01 Andreas Hanssontest: Use SimpleMemory for atomic full-system tests
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2013-11-01 Andreas Hanssonsim: Clarify the difference between tracing and debugging
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2013-10-17 Andreas Hanssonbuild: Place proto output in the same directory, also...
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2013-10-09 Andreas Hanssonstats: Bump pc-simple-timing-ruby stats
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2013-10-02 Andreas Hanssonkvm: Only include KVM support for supported kernels
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2013-10-02 Andreas Hanssonext: Fix fputils compiler flags to ensure ISO C99
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2013-09-18 Andreas Hanssonmem: Fix scheduling bug in SimpleMemory
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2013-09-18 Andreas Hanssonswig: Warn on use of incompatible swig/gcc combinations
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2013-09-18 Andreas Hanssonswig: Fix issue with circular import in 2.0.9/2.0.10
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2013-09-12 Andreas Hanssonconfig: Add voltage domain to Ruby example scripts
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2013-09-05 Andreas Hanssonsim: Fix clang warning for unused variable
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2013-09-04 Andreas Hanssonutil: Add ini string as tooltip info in dot output
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2013-09-04 Andreas Hanssonutil: Add colours to the dot output
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2013-09-04 Andreas Hanssonutil: Add class name to dot graph and output to svg
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2013-09-04 Andreas Hanssontests: Move ISA-independent tests to the NULL ISA
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2013-09-04 Andreas Hanssonarch: Resurrect the NOISA build target and rename it...
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2013-09-04 Andreas Hanssoncpu: Move the branch predictor out of the BaseCPU
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2013-09-04 Andreas Hanssonarch: Header clean up for NOISA resurrection
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2013-09-04 Andreas Hanssonalpha: Move system virtProxy to Alpha only
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2013-09-04 Andreas Hanssonscons: Enable build on OSX
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2013-08-20 Andreas Hanssoncpu: Fix timing CPU isDrained comment formatting
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2013-08-20 Andreas Hanssonbase: Fix VectorPrint initialisation
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2013-08-19 Andreas Hanssonstats: Cumulative stats update
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2013-08-19 Andreas Hanssonconfig: Command line support for multi-channel memory
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2013-08-19 Andreas Hanssonmem: Change AbstractMemory defaults to match the common...
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2013-08-19 Andreas Hanssonmem: Use STL deque in favour of list for DRAM queues
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2013-08-19 Andreas Hanssonmem: Perform write merging in the DRAM write queue
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2013-08-19 Andreas Hanssoncpu: Fix timing CPU drain check
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2013-08-19 Andreas Hanssonalpha: Check interrupts before quiesce
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2013-08-19 Andreas Hanssonconfig: Move the memory instantiation outside FSConfig
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2013-08-19 Andreas Hanssonmem: Warn instead of panic for tXAW violation
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2013-08-19 Andreas Hanssonmem: Allow disabling of tXAW through a 0 activation...
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2013-08-19 Andreas Hanssonmem: Add an internal packet queue in SimpleMemory
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2013-08-19 Andreas Hanssoncpu: Fix a bug in the O3 CPU introduced by the cache...
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2013-07-18 Andreas Hanssonconfig: Update script to set cache line size on system
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2013-07-18 Andreas Hanssonmem: Set the cache line size on a system level
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2013-07-18 Andreas Hanssonscons: Use python-config instead of distutils
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2013-07-18 Andreas Hanssonsim: Make MaxTick in Python match the one in C++
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2013-06-27 Andreas Hanssonstats: Update stats for monitor, cache and bus changes
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2013-06-27 Andreas Hanssonmem: Remove the cache builder
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2013-06-27 Andreas Hanssonconfig: Remove Clock parameter multiplication
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2013-06-27 Andreas Hanssonconfig: Add a BaseSESystem builder for re-use in regressions
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2013-06-27 Andreas Hanssontests: Prune 00.gzip from the regressions
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2013-06-27 Andreas Hanssonmem: Tidy up the bridge with const and additional checks
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2013-06-27 Andreas Hanssonmem: Fix CommMonitor style and response check
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2013-06-27 Andreas Hanssonmem: Align cache timing to clock edges
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2013-06-27 Andreas Hanssoncpu: Consider instructions waiting for FU completion...
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2013-06-27 Andreas Hanssonmem: Cycles converted to Ticks in atomic cache accesses
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2013-06-27 Andreas Hanssonscons: Identify runs that fail and runs with stats...
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2013-06-27 Andreas Hanssonbase: Fix address range granularity calculation
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2013-06-27 Andreas Hanssonmem: Remove a redundant heap allocation for a snoop...
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2013-06-27 Andreas Hanssonmem: Remove CoherentBus snoop port unused private member
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2013-06-24 Andreas Hanssonstats: Bump x86 stats
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2013-05-30 Andreas Hanssonstats: Update the stats to reflect bus and memory changes
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2013-05-30 Andreas Hanssonmem: More descriptive DRAM config names
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2013-05-30 Andreas Hanssonmem: Add bytes per activate DRAM controller stat
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2013-05-30 Andreas Hanssonmem: Add static latency to the DRAM controller
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2013-05-30 Andreas Hanssonmem: Spring cleaning of MSHR and MSHRQueue
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2013-05-30 Andreas Hanssonmem: Fix MSHR print format
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2013-05-30 Andreas Hanssoncpu: Prune the stale TraceCPU
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2013-05-30 Andreas Hanssoncpu: Add request elasticity to the traffic generator
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2013-05-30 Andreas Hanssoncpu: Block traffic generator when requests have to...
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2013-05-30 Andreas Hanssoncpu: Move traffic generator sending out of generator...
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2013-05-30 Andreas Hanssoncpu: Fold together the StateGraph and the TrafficGen
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2013-05-30 Andreas Hanssonmem: Make returning snoop responses occupy response...
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2013-05-30 Andreas Hanssonmem: Make the buses multi layered
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2013-05-30 Andreas Hanssonmem: Separate the two snoop response cases in the bus
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2013-05-30 Andreas Hanssonmem: Tidy up a few variables in the bus
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2013-05-30 Andreas Hanssonmem: Use unordered set in bus request tracking
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2013-05-30 Andreas Hanssonmem: Check for waiting state in bus draining
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2013-05-30 Andreas Hanssonmem: Add a LPDDR3-1600 configuration
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2013-05-30 Andreas Hanssonmem: Adapt the LPDDR2 to match a single x32 channel
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2013-05-30 Andreas Hanssonmem: Avoid explicitly zeroing the memory backing store
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2013-05-30 Andreas Hanssonutil: Auto generate the packet proto definitions
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2013-05-30 Andreas Hanssonbase: Avoid size limitation on protobuf coded streams
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2013-05-30 Andreas Hanssoncpu: Make hash struct instead of class to please clang
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2013-04-28 Andreas Hanssonconfig: Added memory type to t1000 regression
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2013-04-23 Andreas Hanssoncpu: Fix TraceGen flag initalisation
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2013-04-22 Andreas Hanssonmem: Address mapping with fine-grained channel interleaving
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2013-04-22 Andreas Hanssonmem: More descriptive enum names for address mapping
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2013-04-22 Andreas Hanssoncpu: Use request flags in trace playback
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2013-04-22 Andreas Hanssoncpu: Make the generators usable outside the TrafficGen...
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2013-04-22 Andreas Hanssonconfig: Add a mem-type config option to se/fs scripts
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2013-04-22 Andreas Hanssonmem: Add a WideIO DRAM configuration
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2013-04-22 Andreas Hanssonmem: Replace check with panic where inhibited should...
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2013-04-19 Andreas Hanssonstats: Update stats for ldr_ret_uop (changeset 35198406dd72)
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2013-04-17 Andreas Hanssondev: Fix a bug in the use of seekp/seekg
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2013-04-16 Andreas Hanssonstats: Bump the vortex stats to match latest behaviour
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2013-03-26 Andreas Hanssonutil: Add a utility script for decoding packet traces
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2013-03-26 Andreas Hanssonutil: Add a utility script for encoding packet traces
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2013-03-26 Andreas Hanssonstats: Update stats for cache retry event check
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