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gem5.git
2018-07-13
Andreas Sandberg
cpu: Unify error handling for address generators
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2018-07-13
Andreas Sandberg
cpu: Split the traffic generator into two classes
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2018-07-10
Jason Lowe...
misc: Fix BaseCPU doxygen
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2018-07-09
Robert
arch-riscv: enable rudimentary fs simulation
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2018-07-09
Austin Harris
arch-riscv: Fix the srlw and srliw instructions.
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2018-06-29
Andreas Sandberg
base: Add a M5_PUBLIC and M5_LOCAL attribute macro
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2018-06-28
Andreas Sandberg
python: Fix call bug in @cxxMethod when override is...
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2018-06-28
Andreas Sandberg
cpu: Remove reduntant protobuf includes
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2018-06-28
Andreas Sandberg
python: Fixup incorrect syntax in PyBind argument handler
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2018-06-28
Andreas Sandberg
mem: Add a memory delay simulator
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2018-06-28
Andreas Sandberg
arch-arm: Fix incorrect t{0,1}sz field in TTBCR
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2018-06-28
Giacomo Travaglini
base: Add an asymmetrical Coroutine class
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2018-06-26
Alexandru Dutu
gpu-compute: Remove unneeded Request::setVirt call
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2018-06-26
Nikos Nikoleris
python: Add support for multiplying proxies to compatib...
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2018-06-26
Gabe Black
scons: Generalize building binaries.
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2018-06-25
Matt Sinclair
syscall_emul: adding symlink system call
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2018-06-25
Matt Sinclair
syscall_emul: adding link system call
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2018-06-22
Nikos Nikoleris
mem-cache: Promote deferred targets on cache clean...
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2018-06-22
Nikos Nikoleris
mem-cache: Promote targets that don't require writable
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2018-06-22
Nikos Nikoleris
mem-cache: Fix promoting of targets that need writable
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2018-06-22
Nikos Nikoleris
mem-cache: Selectively clear downstream pending
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2018-06-22
Matteo M. Fusi
SConstruct: additional message for the error checking...
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2018-06-22
Giacomo Travaglini
arch-arm: AArch32 execution triggering AArch64 SW Break
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2018-06-22
Giacomo Travaglini
arch-arm: BadMode checking if corresponding EL is imple...
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2018-06-21
Gabe Black
base: Add a class which encapsulates Fibers.
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2018-06-21
Andreas Sandberg
sim: Use the canonical way of iterating over a dictionary
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2018-06-21
Andreas Sandberg
dev-arm: Use recurseDeviceTree instead of custom in...
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2018-06-21
Giacomo Travaglini
cpu: Fix bug introduced by RequestPtr type change
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2018-06-20
Nikos Nikoleris
base: Fix includes in AddrRangeMap header file
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2018-06-20
Jason Lowe...
mem-cache: Fix TempCacheBlock insert
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2018-06-19
Nikos Nikoleris
mem: Use address range to find the right physical address
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2018-06-19
Nikos Nikoleris
mem: Use address range to find the destination port...
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2018-06-19
Gabe Black
mem: Use the caching in the AddrRangeMap class in Physi...
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2018-06-19
Gabe Black
mem: Use the caching built into AddrRangeMap in the...
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2018-06-19
Gabe Black
base: Build caching into the AddrRangeMap class
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2018-06-19
Nikos Nikoleris
base, mem: Disambiguate if an addr range is contained...
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2018-06-19
Nikos Nikoleris
mem-cache: Fix support for secure blocks in the FALRU...
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2018-06-15
Daniel R. Carvalho
mem-cache: Initialize CacheBlk data pointer
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2018-06-15
Daniel R. Carvalho
mem-cache: Forward declare ReplaceableEntry
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2018-06-15
Nikos Nikoleris
dev-arm: Fix the address range for some I/O devices
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2018-06-15
Tuan Ta
tests,style: add RISC-V assembly tests
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2018-06-15
Gabe Black
sim: Add a SimObject python field which overrides the...
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2018-06-14
Tuan Ta
cpu: Prevent suspended TimingSimple CPUs from fetching...
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2018-06-14
Tuan Ta
cpu: add a new instruction type 'Atomic'
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2018-06-14
Tuan Ta
arch: support issuing Atomic Mem Operation (AMO) requests
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2018-06-14
Tuan Ta
base,mem: Support AtomicOpFunctor in the classic memory...
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2018-06-14
Jason Lowe...
ruby: Revamp standalone SLICC script
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2018-06-14
Giacomo Travaglini
arch-arm: Adapting IllegalExecution fault for AArch32
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2018-06-14
Giacomo Travaglini
arch-arm: Add Illegal Execution flag to PCState
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2018-06-14
Giacomo Travaglini
arch-arm: Read APSR in User Mode
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2018-06-14
Andreas Sandberg
system-arm: Split the VExpress_GEM5_V1 base dts
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2018-06-14
Rohit Kurup
dev-arm: Add new VExpress_GEM5_V1_Base Platform
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2018-06-14
Andreas Sandberg
cpu-minor: Remove redundant thread startup call
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2018-06-14
Andreas Sandberg
dev-arm: Remove deprecated GIC test interfaces
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2018-06-13
Gabe Black
tests: Make "UnitTest"s more like GTest so they can...
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2018-06-13
Nikos Nikoleris
mem-cache: Remove unnecessary cast in SectorTags::findV...
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2018-06-13
Giacomo Travaglini
arch-arm: Fix missing Request allocation
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2018-06-13
Daniel R. Carvalho
mem-cache: Insert on block allocation
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2018-06-13
Daniel R. Carvalho
mem-cache: Make packet const in insertBlock
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2018-06-13
Daniel R. Carvalho
mem-cache: Create Sector Cache
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2018-06-12
Tuan Ta
tests: add some pthread and std::thread unit tests
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2018-06-12
Daniel R. Carvalho
ruby: Fix initial weight in weighted LRU
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2018-06-11
Giacomo Travaglini
misc: Using smart pointers for memory Requests
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2018-06-11
Giacomo Travaglini
misc: Substitute pointer to Request with aliased RequestPtr
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2018-06-08
Daniel R. Carvalho
mem-cache: Change Cache block tag check
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2018-06-08
Daniel R. Carvalho
mem-cache: Use secure bit in findVictim
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2018-06-08
Daniel R. Carvalho
mem-cache: Move tagsInUse to children
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2018-06-08
Daniel R. Carvalho
mem-cache: Return evictions along with victims
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2018-06-08
Daniel R. Carvalho
mem-cache: Use ReplaceableEntry in findBlockBySetAndWay
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2018-06-08
Gabe Black
sim: Rename the SimObject cxx_bases field to cxx_extra_...
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2018-06-07
Andreas Sandberg
dev-arm: Add a VirtIO MMIO device to VExpress_GEM5_V1
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2018-06-07
Andreas Sandberg
dev-arm: Add a MMIO transport interface for VirtIO
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2018-06-07
Andreas Sandberg
dev-arm: Add a GIC interrupt adaptor
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2018-06-06
Andreas Sandberg
arch-arm: Remove dead doingStage2 variable in PT walker
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2018-06-06
Andreas Sandberg
system-arm: Update gem5 timer interrupt specification
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2018-06-06
Andreas Sandberg
arch-arm: Perform stage 2 lookups using the EL2 state
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2018-06-06
Andreas Sandberg
arch-arm: Respect EL from translation type
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2018-06-06
Andreas Sandberg
arch-arm: Fix page size handling when merging stage...
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2018-06-06
Andreas Sandberg
dev, arm: Add support for HYP & secure timers
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2018-06-06
Andreas Sandberg
arch-arm: Adjust breakpoint EC depending on source...
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2018-06-01
Daniel R. Carvalho
mem-cache: Privatize extractSet
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2018-06-01
Daniel R. Carvalho
mem-cache: Create an address aware TempCacheBlk
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2018-06-01
Daniel R. Carvalho
mem-cache: Fix secure bit modification
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2018-05-31
Nikos Nikoleris
mem-cache: Replace block visitor with std::function
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2018-05-31
Nikos Nikoleris
mem-cache: Fix include directives in the cache related...
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2018-05-31
Nikos Nikoleris
mem-cache: Add a non-coherent cache
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2018-05-31
Nikos Nikoleris
mem-cache: Move cache bypass mechanism to the ports
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2018-05-31
Nikos Nikoleris
mem-cache: Adopt a more sensible cache class hierarchy
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2018-05-31
Nikos Nikoleris
mem-cache: Add helper function to perform evictions
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2018-05-31
Nikos Nikoleris
mem-cache: Delegate block invalidation to block allocation
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2018-05-31
Nikos Nikoleris
mem-cache: Refactor the recvAtomic function
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2018-05-31
Nikos Nikoleris
mem-cache: Refactor the cache recvTimingReq function
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2018-05-31
Nikos Nikoleris
mem-cache: Refactor the cache recvTimingResp function
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2018-05-31
Daniel R. Carvalho
mem-cache: Fix RandomReplData
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2018-05-30
Brandon Potter
gpu-compute: use X86ISA::TlbEntry over GpuTlbEntry
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2018-05-30
Michael LeBeane
dev: Exit correctly in dist-gem5 for SE mode
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2018-05-30
Nikos Nikoleris
mem-cache: Determine if an MSHR has requests from anoth...
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2018-05-29
Giacomo Travaglini
arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL...
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2018-05-29
Giacomo Travaglini
arch-arm: Remove unusued MISCREG_A64_UNIMPL
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2018-05-29
Giacomo Travaglini
arch-arm: MPIDR.MT = 1 in a multithreaded system
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