openpower-isa.git
2022-09-17 Luke Kenneth... add vec2/3/4 test_pysvp64dis test
2022-09-16 Luke Kenneth... comments on test_9_fptrans
2022-09-16 Dmitry Selyutintest_power_decoder: mark minor_19.csv as opint
2022-09-16 Dmitry Selyutintest_pysvp64dis: test fptrans
2022-09-16 Dmitry Selyutinselectable_int: replace bit_count with bit_length
2022-09-16 Dmitry Selyutinsv_binutils_fptrans: adopt script for reuse
2022-09-16 Dmitry Selyutinpower_insn: postpone updating per-instruction operands
2022-09-15 Dmitry Selyutinpower_insn: perform faster PPC database lookups
2022-09-15 Dmitry Selyutinsv_binutils_fptrans: fix disassembly
2022-09-15 Dmitry Selyutinsv_binutils_fptrans: fptrans binutils generator
2022-09-15 Dmitry Selyutinpower_insn: support instruction bytes conversion
2022-09-15 Dmitry Selyutinselectable_int: allow setting multiple bit
2022-09-15 Dmitry Selyutinpower_insn: allow accessing instruction bits
2022-09-15 Luke Kenneth... add minor_4.csv for maddld/maddhdu/maddhd and to insn_d...
2022-09-15 Luke Kenneth... fix sprset mtspr/mfspr pseudocode with wrong definition of
2022-09-14 Jacob Lifshayadd svp64 fptrans tests
2022-09-14 Jacob Lifshayinclude *all* fprs/gprs/cr-fields in SimState
2022-09-14 Jacob Lifshayfix sv_analysis for fpown and frootn
2022-09-14 Jacob Lifshayfix some typos
2022-09-13 Dmitry Selyutinpower_insn: support signed operands
2022-09-13 Dmitry Selyutinpower_insn: support branch RM
2022-09-13 Dmitry Selyutinpower_insn: support CR RM
2022-09-13 Dmitry Selyutinpower_enums: convert SVExtra to RegType
2022-09-13 Dmitry Selyutinpower_insn: refactor RM mapping
2022-09-13 Dmitry Selyutinsv_binutils: support multiple opcodes; minor fixes
2022-09-13 Luke Kenneth... correct assrmbler in test_pysvpy4dis.py
2022-09-13 Jacob Lifshayfix X-FORM lines for fptrans -- I forgot Rc
2022-09-13 Jacob Lifshayadd missing X-FORM lines for fptrans
2022-09-13 Jacob Lifshayadd comment that fptrans test cases output values are...
2022-09-13 Jacob Lifshayadd new fptrans unit tests
2022-09-13 Jacob Lifshayadd fptrans support to isa caller
2022-09-13 Jacob Lifshayadd fp support to TestRunnerBase
2022-09-13 Luke Kenneth... add first pack/unpack to ISACaller
2022-09-13 Luke Kenneth... add setter/getter properties to SVP64State, minor code...
2022-09-13 Luke Kenneth... remove pack/unpack from SVP64RMModeDecode, it is now...
2022-09-13 Luke Kenneth... add batch of instructions from
2022-09-12 Luke Kenneth... add hack overloaded meaning of destwid to be pack/unpack.
2022-09-12 Dmitry Selyutinpower_insn: refactor RM mapping
2022-09-12 Dmitry Selyutinsv_binutils: support multiple opcodes; minor fixes
2022-09-12 Dmitry Selyutinpower_insn: call sv_spec_leave unconditionally
2022-09-12 Dmitry Selyutinpower_enums: consider CRIn2Sel
2022-09-12 Dmitry Selyutinpower_insn: fix RCOE check
2022-09-12 Dmitry Selyutinpower_insn: introduce pseudo cr_in2
2022-09-12 Dmitry Selyutinpower_enums: strict selectors conversion
2022-09-12 Dmitry Selyutinpower_insn: fix typo
2022-09-12 Dmitry Selyutinpower_insn: support BRANCH and CR mode stubs
2022-09-12 Dmitry Selyutinpower_insn: refactor register operands
2022-09-12 Jacob Lifshayadd pseudocode for all fptrans ops
2022-09-12 Jacob Lifshayadd fptrans helpers, switching existing uses to new...
2022-09-12 Luke Kenneth... add hphint and pack/unpack into SVSTATE SPR layout
2022-09-12 Jacob Lifshayadd fptrans ops to src/openpower/sv/trans/svp64.py
2022-09-12 Jacob Lifshayadd rest of new fptrans ops to CSVs
2022-09-12 Luke Kenneth... remove pack/unpack - now part of sv.setvl
2022-09-12 Luke Kenneth... add rudimentary sv.setvl unit test to just check that...
2022-09-12 Luke Kenneth... add sv.setvl to instructions as a major hack
2022-09-12 Luke Kenneth... split out setvl from sv.setvl test in test_pysvp64dis.py
2022-09-12 Luke Kenneth... add extra tests "add." "addo" etc. to test_pysvp64dis.py
2022-09-12 Luke Kenneth... demo that "setvl." is not reconstructed with Rc=1 mode
2022-09-12 Luke Kenneth... some weird moving of opcodes around, probably because...
2022-09-12 Luke Kenneth... skip addpcis for now, needs properly qualifying
2022-09-12 Jacob Lifshayfix svanalysis failing due to missing comma in addpcis...
2022-09-11 Luke Kenneth... add new CRIn2Sel for later, for getting rid of CRInSel...
2022-09-11 Luke Kenneth... BFT does not exist
2022-09-11 Luke Kenneth... add sv.isel 12,2,3,*99 test to test_pysvp64dis.py
2022-09-11 Luke Kenneth... add some CR3 pysvp64dis.py tests, sv.crand
2022-09-11 Dmitry Selyutinpower_insn: check exact matches directly in set
2022-09-11 Dmitry Selyutinpower_insn: group opcodes and names
2022-09-11 Luke Kenneth... add sv.isel asm-disasm tests to test_pysvp64dis.py
2022-09-11 Luke Kenneth... add missing addpcis to power_enums.py and minor_19.csv
2022-09-11 Luke Kenneth... convert minor_19 to bitpattern (for adding addpcis)
2022-09-11 Luke Kenneth... whoops lsbshf=2 for CR5
2022-09-11 Luke Kenneth... whoops missed lsb-shift parameter
2022-09-11 Luke Kenneth... add comments into CR5Operand class
2022-09-11 Luke Kenneth... add CR5Operand and CR3Operand to power_insns.py
2022-09-10 Luke Kenneth... huhn? addpcis converts to .long? huhn?
2022-09-10 Luke Kenneth... fix issue with pysvp64dis.py load() reading from stdin
2022-09-10 Dmitry Selyutinpower_insn: perform minor opcodes cleanup
2022-09-10 Dmitry Selyutinpower_insn: hopefully final take on the opcodes
2022-09-10 Dmitry Selyutinpower_insn: yet another take on the opcodes
2022-09-10 Luke Kenneth... whitespace cleanup
2022-09-10 Luke Kenneth... add quine-mckluskey algorithm
2022-09-10 Dmitry Selyutinpower_insn: refactor register verbose assembly
2022-09-10 Dmitry Selyutinpower_insn: support pcode
2022-09-10 Dmitry Selyutinpower_insn: tune TargetAddrOperand disassembly
2022-09-10 Dmitry Selyutinpower_insn: support CR remap
2022-09-10 Dmitry Selyutinpower_insn: support non-zero operands
2022-09-10 Dmitry Selyutinpower_insn: simplify operand naming conventions
2022-09-10 Dmitry Selyutinpower_insn: drop redundant dataclass incantations
2022-09-10 Dmitry Selyutinpower_insn: do not print blob suffix unless needed
2022-09-10 Dmitry Selyutinpower_insn: do not panic upon database query
2022-09-10 Dmitry Selyutinpower_insn: refactor opcode matching
2022-09-10 Dmitry Selyutinpower_insn: support D operand in DX form
2022-09-10 Dmitry Selyutinpower_insn: refactor span detection
2022-09-10 Dmitry Selyutinpower_insn: simplify code
2022-09-10 Dmitry Selyutinpower_insn: remove redundant code
2022-09-10 Dmitry Selyutinpower_insn: decouple extra merge routine
2022-09-10 Dmitry Selyutinpower_insn: rename extra to spec
2022-09-10 Dmitry Selyutinpower_insn: deprecate redundant else section
2022-09-10 Dmitry Selyutinpower_insn: rename Extra classes
2022-09-10 Dmitry Selyutinfields.text: this fish ain't moving
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