ieee754fpu.git
2019-02-14 Aleksandar... Turned the normalise_2 verilog state into nmigen
2019-02-14 Aleksandar... Merge branch 'master' of ssh://libre-riscv.org:922...
2019-02-14 Aleksandar... Turned the add_1 verilog state into nmigen
2019-02-14 Luke Kenneth... corrections on compile
2019-02-14 Luke Kenneth... add align phase
2019-02-14 Luke Kenneth... whoops accidentally indented too far
2019-02-14 Luke Kenneth... add code comments
2019-02-14 Luke Kenneth... reformat / indent add_0 stage
2019-02-14 Aleksandar... Turned the add_0 verilog state into nmigen
2019-02-14 Luke Kenneth... add zero and denormalised checks
2019-02-14 Luke Kenneth... add special case, b when a is zero
2019-02-14 Luke Kenneth... add b inf special case
2019-02-14 Luke Kenneth... cleanup and comments
2019-02-14 Luke Kenneth... add inf special case
2019-02-14 Luke Kenneth... whitespace (indent)
2019-02-14 Luke Kenneth... add first of special_cases
2019-02-14 Luke Kenneth... invert Cat order, use 3 zeros (3 bits)
2019-02-14 Luke Kenneth... spelling correction
2019-02-14 Luke Kenneth... corrected syntax for unpack block
2019-02-13 Aleksandar... Replicated unpack part of always block into nmigen
2019-02-13 Luke Kenneth... add experiment
2019-02-04 Luke Kenneth... add git submodule init to Makefile
2019-02-04 Luke Kenneth... added berkeley softfloat library submodule