nmigen.git
2020-11-13 whitequarkvendor.quicklogic: write OpenOCD scripts as part of...
2020-11-10 whitequarkbuild.plat: TemplatedPlatform.iter_extra_files→Platform...
2020-11-09 awyglehdl.rec: proxy operators correctly.
2020-11-06 Konrad Beckmannvendor.intel: add support for Cyclone V internal oscillator
2020-11-06 whitequarkhdl.ast: deprecate UserValue in favor of ValueCastable.
2020-11-06 whitequarksim.pysim: avoid redundant VCD updates.
2020-11-06 whitequarkexamples: clean up oudated code.
2020-11-06 whitequarkFix commit 8313d6e7.
2020-11-06 whitequarkcli: update deprecated import.
2020-11-06 whitequarkCI: add CPython 3.9 to test matrix.
2020-11-06 whitequarkCI: run testsuite with -Werror.
2020-11-06 whitequarkvendor.lattice_{ice40,ecp5}: clean up $verilog_initial_...
2020-11-06 awyglehdl.rec: migrate Record from UserValue to ValueCastable.
2020-11-06 awyglehdl.ast: implement ValueCastable.
2020-11-05 whitequarkvendor.quicklogic: part→package
2020-11-03 Norbert Braunvendor.xilinx_7series: byte swap generated bitstream
2020-11-03 Jaro Habigerlib.fifo: fix {r,w}_level in AsyncFIFOBuffered
2020-11-03 Jaro Habigerlib.fifo: fix level on fifo full
2020-11-02 David Lattimorevendor.lattice_ice40: zero-pad CLKHF_DIV in SB_HFOSC...
2020-10-30 Jan Kowalewskivendor.quicklogic: utilize internal SoC clock in EOS-S3
2020-10-30 Jan Kowalewskivendor.quicklogic: fix toolchain nomenclature
2020-10-28 Robin Ole Heinemannlib.fifo.AsyncFFSynchronizer: check input and output...
2020-10-27 Ben Newhousesetup: link to latest docs if VCS information is not...
2020-10-26 whitequarkbuild.dsl: clean up inversion logic.
2020-10-25 whitequarkback.{verilog,rtlil}: adjust $verilog_initial_trigger...
2020-10-25 whitequarkCI: disable codecov project status.
2020-10-24 anuejnlib.fifo.AsyncFIFO: fix incorrect latency of r_level.
2020-10-22 anuejntests: make spec directory name unique per test method.
2020-10-22 whitequarksim._pyrtl: sign extend RHS of assignment.
2020-10-22 whitequarkhdl.dsl: error on Elif immediately nested in an If.
2020-10-19 Jan Kowalewskivendor.quicklogic: fix syntax
2020-10-19 Xiretzasetup.py: Exclude "tests" package
2020-10-18 Xiretzahdl.ir: Update error message for Instance arguments
2020-10-15 whitequarkREADME: Quicklogic EOS S3 is now supported.
2020-10-15 whitequarkCI: fix code coverage collection.
2020-10-15 Jan Kowalewskivendor.quicklogic: new platform.
2020-10-15 whitequarktests: keep comments up to date. NFC.
2020-10-15 whitequarkbuild.plat: avoid type confusion in _check_feature.
2020-09-17 Jean-François... hdl.mem: document ReadPort and WritePort.
2020-08-29 William D.... vendor.lattice_{ecp5,machxo_2_3l}: explain how to set...
2020-08-27 whitequarksetup: synchronize builtin-yosys dependency.
2020-08-27 whitequarkback.verilog: use `proc -nomux` if it is available.
2020-08-27 whitequarksim: split into base, core, and engines.
2020-08-27 whitequarksim.pysim: in write_vcd(), close files if an exception...
2020-08-27 whitequarksim._pyclock: new type of process.
2020-08-27 whitequarksim._pycoro: make src_loc() more robust.
2020-08-27 whitequark_toolchain.cxx: work around PyPy missing LDCXXSHARED...
2020-08-27 whitequark_toolchain.cxx: new toolchain.
2020-08-27 whitequarkhdl.ast: clarify exception message for out of bounds...
2020-08-27 whitequarknmigen.test.utils: restore FHDLTestCase to gracefully...
2020-08-27 whitequarktests: move out of the main package.
2020-08-26 William D.... build.run: implement SSH remote builds using Paramiko.
2020-08-26 whitequarkback.rtlil: do not squash empty modules.
2020-08-26 whitequarkback.verilog: omit Verilog initial trigger only if...
2020-08-26 whitequarkvendor.xilinx_{7series,ultrascale}: set BUFG* SIM_DEVIC...
2020-08-26 whitequarkvendor.xilinx_7series: unbreak.
2020-08-26 whitequarksim._pyrtl: optimize uses of reflexive operators.
2020-08-26 whitequarkback.cxxrtl: actualize Yosys version requirement.
2020-08-26 whitequarkhdl.ast: avoid unnecessary sign padding in ArrayProxy.
2020-08-26 whitequarksim._pyrtl: fix miscompilation of -(Const(0b11, 2)...
2020-08-26 whitequarklib.cdc: in AsyncFFSynchronizer(), rename domain= to...
2020-08-24 Robin Ole Heinemannvendor.lattice_machxo_2_3l: add SRAM svf generation
2020-08-24 Mariusz Glebockivendor: Add initial support for Symbiflow for Xilinx...
2020-08-24 Mariusz Glebockivendor.xilinx_7series: add `_part` property getter
2020-08-22 Xiretzacli: Improve help texts
2020-08-15 whitequarkdocs/lang: use less confusing placeholder variable...
2020-08-15 awyglelib.fifo: add `r_level` and `w_level` to all FIFOs
2020-08-13 whitequarkAdd Linguist tags to .gitattributes.
2020-08-10 Robin Ole Heinemannvendor.lattice_{ecp5,machxo_2_3l}: specify impl-dir...
2020-07-31 whitequarkbuild,vendor: never carry around parts of differential...
2020-07-31 whitequarkvendor.xilinx_{7series,ultrascale}: use BUFGCTRL rather...
2020-07-30 Adam Greighdl.mem: cast reset value for transparent read ports...
2020-07-28 Jean THOMASnmigen.lib.scheduler: add RoundRobin.
2020-07-28 Jacob Gravestests: fix remove unnecessary workaround for some unitt...
2020-07-23 whitequarkvendor.xilinx_{7series,ultrascale}: add SIM_DEVICE...
2020-07-23 Jean THOMASvendor.lattice_ecp5: add missing differential IO types.
2020-07-22 whitequarkback.rtlil: lower maximum accepted wire size.
2020-07-22 whitequarksim._pycoro: avoid spurious wakeups.
2020-07-22 whitequarkCI: replace Travis with GitHub Actions.
2020-07-21 whitequarkcompat.fhdl.bitcontainer: fix value_bits_sign().
2020-07-16 whitequarkCI: use WASM yosys instead of building our own.
2020-07-15 whitequarkback.rtlil: fix guard for division by zero.
2020-07-14 Filipe Laínsdocs: add install instructions for arch
2020-07-14 whitequarkCI: run on pull requests as well, not just pushes.
2020-07-13 whitequarklib.cdc: fix typo.
2020-07-13 Jacob Lifshaysim.pysim: write the next, not curr signal value to...
2020-07-11 whitequarksim.pysim: use VCD aliases to reduce space and time...
2020-07-08 whitequarksim: simplify. NFC.
2020-07-08 whitequarkback.pysim→sim.pysim; split into more manageable parts.
2020-07-08 whitequarkvendor.xilinx_{7series,ultrascale}: remove `grade`...
2020-07-08 whitequarkback.pysim: only extract signal names if VCD is requested.
2020-07-08 whitequarkback.pysim: reset timeline as well.
2020-07-08 whitequarkback.pysim: simplify. NFC.
2020-07-08 whitequarkback.pysim: extract timeline handling to class _Timelin...
2020-07-08 whitequarkback.pysim: extract simulator commands to sim._cmds...
2020-07-08 whitequarkback.pysim: simplify. NFC.
2020-07-07 awyglehdl.ast: don't inherit Shape from NamedTuple.
2020-07-07 whitequarkback.pysim: simplify.
2020-07-07 whitequarkback.pysim: simplify. NFC.
2020-07-07 whitequarkback.pysim: simplify. NFC.
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