vendor.quicklogic: fix syntax

Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>

diff --git a/nmigen/vendor/quicklogic.py b/nmigen/vendor/quicklogic.py
index 1e4db5afa47841ef68d63c03bf13ccb70705f6ff..b831bfc20d25a5d8f3646f947c5b20f510432286 100644 (file)
--- a/nmigen/vendor/quicklogic.py
+++ b/nmigen/vendor/quicklogic.py
@@ -118,7 +118,7 @@ class QuicklogicPlatform(TemplatedPlatform):
 
     # Common logic
 
-    def __init__(self, *):
+    def __init__(self):
         super().__init__()
 
     def add_clock_constraint(self, clock, frequency):