gem5.git
2020-02-13 Gabe Blackbase: Delete alpha loader components.
2020-02-13 Gabe Blackdev: Delete alpha devices.
2020-02-13 Gabe Blacksim: Remove mention of alpha.
2020-02-13 Gabe Blackcpu: Remove alpha specialized code.
2020-02-13 Gabe Blackconfigs: Remove mentions of alpha from the configs.
2020-02-13 Gabe Blacksystem: Delete alpha files from system.
2020-02-13 Gabe Blackscons: Delete the ALPHA default build configuration.
2020-02-13 Bobby R. Brucemisc: Updated git-commit-msg.py to print rejected commit
2020-02-13 Gabe Blackscons,arch: Remove simple scalar compatibility.
2020-02-13 Gabe Blackarm: Don't checkpoint the SystemCounter's "_period...
2020-02-13 Gabe Blackarm: "Correct" the spelling of flavor.
2020-02-13 Gabe Blackarch,cpu: Make the CPU's ISA parameter type BaseISA.
2020-02-13 Giacomo Travagliniext: Add failure node to JUnit xml file
2020-02-13 Bobby R. Brucemisc: Updated CONTRIBUTING.md to discuss releases and...
2020-02-13 Bobby R. Brucemisc: Updated CONTRIBUTING.md to discuss WIP changes
2020-02-13 Bobby R. Brucemisc: Updated CONTRIBUTING.md for master-as-stable...
2020-02-13 Bobby R. Brucemisc: Removed old contribution guidelines regarding...
2020-02-11 Gabe Blackmem: Eliminate the now unused GENERIC_IPR request flag.
2020-02-11 Gabe Blackarch: Get rid of the generic mmapped IPR mechanism.
2020-02-11 Gabe Blackarm: Call pseudoInst directly from the mmapped IPR...
2020-02-11 Giacomo Travaglinitests,misc: update TESTING.md documentation
2020-02-10 Gabe Blackscons: Fix an error about an unrecognized compiler.
2020-02-10 Daniel R. Carvalhobase: Fix squares of stats
2020-02-10 Gabe Blackbase: Use a const auto & in a range based for loop.
2020-02-10 Gabe Blackriscv: Cast to float explicitly when comparing a float...
2020-02-10 Gabe Blackarm: Fix how a bitfield is extracted in some SVE instru...
2020-02-10 Gabe Blackarch: Add a bunch of missing override specifiers.
2020-02-10 Daniel R. Carvalhomem-cache,mem-ruby: Move WeightedLRU RP
2020-02-10 Giacomo Travaglinitests: hello_se using host tag
2020-02-10 Giacomo Travaglinitests: Add --host tag
2020-02-10 Giacomo Travagliniconfigs: Using VExpress_GEM5_V1 as a default for Options.py
2020-02-10 Giacomo Travagliniarch-arm: LDTRSW was not marked as unpriviledged
2020-02-10 Earl Ousystemc: gem5_to_tlm: treat non-rw as ignorable command
2020-02-08 Gabe Blackarch,sim: Replace setuidFunc with ignoreFunc.
2020-02-08 Gabe Blacksim: Convert most of the common syscalls to use the...
2020-02-08 Gabe Blacksim: Use the Guest ABI mechanism in writeFunc.
2020-02-08 Gabe Blackarch: Switch SyscallDescABI in for SyscallDesc.
2020-02-08 Gabe Blacksim: Add a transitional syscall ABI which defers to...
2020-02-08 Gabe Blackarch: Simplify the SyscallDesc tables.
2020-02-07 Gabe Blackx86: Handle m5 op accesses directly in the mmapped...
2020-02-07 Gabe Blacksim: Add a function for decoding the field(s) of an...
2020-02-07 Gabe Blackx86: Use the m5 op range in the system.
2020-02-07 Gabe Blackarch,sim: Use _m5opRange in System::allocPhysPages.
2020-02-07 Gabe Blacksim: Add a typetraits style mechanism to test for VarArgs.
2020-02-06 Jordi Vaqueroarch-arm: Implement ARMv8.3-JSConv
2020-02-06 Jordi Vaqueroarch-arm: This commit adds Pointer Authentication feature.
2020-02-06 Giacomo Travaglinitests: Move old quick regressions back into their origi...
2020-02-06 Gabe Blacksim: Make it possible for a GuestABI to init its Positi...
2020-02-06 Gabe Blackfastmodel: Ensure unset vec reg bits are zero/false.
2020-02-06 Gabe Blackfastmodel: Implement flattened int reg reading and...
2020-02-05 Nils Asmussenarch-arm: make MicroUopSetPCCPSR SerializeAfter
2020-02-05 Gabe Blackcpu: Make getIsaPtr return a BaseISA pointer.
2020-02-05 Gabe Blackarch: Introduce a base class for ISA classes.
2020-02-05 Gabe Blackarm: Use static_cast to get access the ARM specific...
2020-02-04 Adrian Herreraarch-arm: AArch64 reg access HCR_EL2.E2H filter
2020-02-04 Adrian Herreraarch-arm: reg access permissions highest EL helper
2020-02-04 Giacomo Travagliniarch-arm: Split translateFs to distinguish when MMU...
2020-02-01 Gabe Blackarch,sim: Merge initCPU into the ISA System classes.
2020-02-01 Gabe Blackarch,sim: Merge initCPU and startupCPU.
2020-02-01 Gabe Blacksim,cpu: Move the call to initCPU into System.
2020-02-01 Gabe Blackarch,base,cpu: Add some default constructors/operators...
2020-02-01 Gabe Blackbase: Delete an inet.hh accessor which is unused and...
2020-02-01 Gabe Blackscons: Disable spurious "array-bounds" warnings for...
2020-02-01 Gabe Blackscons: Add a mechanism to append flags when building...
2020-01-31 Ciro Santilliconfigs: allow fs.py and fs_bigLITTLE.py to work withou...
2020-01-31 Ciro Santilliconfigs: fs.py can take multiple disk images on most...
2020-01-31 Ciro Santilliconfig: add --bootloader to fs.py and fs_bigLITTLE.py
2020-01-31 Ciro Santillidev-arm: add boot_loader param to RealView setupBootLoader
2020-01-31 Gabe Blackmem: Make slicc generate some default methods explicitly.
2020-01-29 Bobby R. Brucemisc: Updated old gem5 website URLs with new gem5 websi...
2020-01-29 Ayaz Akramcpu: move initCPU calls from initState to init
2020-01-27 Adrian Herrerasystem-arm: AArch64 boot, init CNTFRQ_EL0
2020-01-25 Gabe Blacksim: Add a GuestABI mechanism to allocate space for...
2020-01-24 Bobby R. Brucetests: Removed 70.twolf tests
2020-01-24 Bobby R. Brucetests: Removed old quick/se/00.hello test resources
2020-01-24 Bobby R. Brucetests: Removed the old ALPHA tests
2020-01-24 Bobby R. Brucetests: Removed 50.vortex tests
2020-01-24 Bobby R. Brucetests: Removed 60.bzip2 tests
2020-01-24 Bobby R. Brucetests: Removed 30.eon tests
2020-01-24 Bobby R. Brucetests: Removed 40.perlbmk tests
2020-01-24 Bobby R. Brucetests: Removed 20.parser tests
2020-01-23 Gabe Blackcpu: Fix ExeTraceRecord::traceInst.
2020-01-23 Gabe Blacksim: Move findFreeContext to System.
2020-01-23 Gabe Blacksim: Eliminate the breakAtKernelFunction function.
2020-01-23 Adrian Herreradev-arm: SP805 peripherals in VExpress_GEM5_Base
2020-01-23 Bobby R. Brucetests: Removing 10.mcf tests
2020-01-23 Gabe Blackcpu: Consolidate and move the CPU's calls to TheISA...
2020-01-22 Ciro Santilliscons: fix --gold-linker build after --as-needed
2020-01-22 Adrian Herreradev-arm: add Watchdog Module SP805 model
2020-01-22 Adrian Herreradev-arm: VExpress_GEM5_Base, add refclock 32KHz
2020-01-22 Giacomo Travaglinitests: Fix python line break in m5_exit test
2020-01-22 Gabe Blackfastmodel: Implement CC reg accessors.
2020-01-22 Gabe Blackarm: Remove checkpointing from the ARM TLBs.
2020-01-22 Gabe Blackarch: Get rid of the unused (and mostly undefined)...
2020-01-21 Bobby R. Brucemisc: Updated CONTRIBUTING.md to discuss branches
2020-01-21 Giacomo Travaglinitests: Add a timeout to getremotetime
2020-01-21 Adrian Herreradev-arm: add FixedClock SimObject
2020-01-21 Giacomo Travaglinitests: Adding --bin-path option to select tests bin...
2020-01-21 Giacomo Travaglinitests: fs/linux/arm passing M5_PATH via commandline
2020-01-21 Daniel R. Carvalhomem-cache: Fix invalidation of prefetchers
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