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gem5.git
2013-09-25
Andreas Sandberg
kvm: Initial x86 support
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2013-09-19
Andreas Sandberg
kvm: Correctly handle the return value from handleIpr...
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2013-09-19
Andreas Sandberg
kvm: Fix a case where the run timers weren't armed...
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2013-09-19
Andreas Sandberg
x86: Add support routines to convert between x87 tag...
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2013-09-18
Andreas Sandberg
sim: Fix undefined behavior in the pseudo-inst interface
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2013-09-18
Andreas Hansson
mem: Fix scheduling bug in SimpleMemory
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2013-09-18
Andreas Hansson
swig: Warn on use of incompatible swig/gcc combinations
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2013-09-18
Andreas Hansson
swig: Fix issue with circular import in 2.0.9/2.0.10
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2013-09-18
Andreas Sandberg
x86: Expose the raw hash map of MSRs
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2013-09-18
Andreas Sandberg
x86: Add support for checking the raw state of an interrupt
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2013-09-18
Andreas Sandberg
x86: Expose the interrupt vector in faults
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2013-09-18
Joel Hestness
configs: Fix ruby_fs.py cache line size
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2013-09-15
Nilay Vaish
stats: update sparc fs due to recent changes to memory...
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2013-09-12
Andreas Hansson
config: Add voltage domain to Ruby example scripts
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2013-09-11
Joel Hestness
ruby: Fix Topology throttle connections
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2013-09-11
Joel Hestness
cpu: Dynamically instantiate O3 CPU LSQUnits
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2013-09-11
Joel Hestness
config: Initialize and check cpt_starttick
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2013-09-11
Joel Hestness
ruby: Statically allocate stats in SimpleNetwork, Switc...
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2013-09-09
Nilay Vaish
stats: add operator= for DataWrapVec class
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2013-09-06
Nilay Vaish
stats: ruby: updates due to recent changes.
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2013-09-06
Nilay Vaish
ruby: network: convert to gem5 style stats
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2013-09-06
Nilay Vaish
ruby: network: correct naming of routers
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2013-09-06
Nilay Vaish
ruby: profiler: removes function resourceUsage()
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2013-09-06
Nilay Vaish
ruby: remove undefined message size type
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2013-09-06
Nilay Vaish
ruby: network: removes reset functionality
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2013-09-06
Nilay Vaish
ruby: network: shorten variable names
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2013-09-06
Nilay Vaish
stats: adds a Formula operator for division
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2013-09-06
Nilay Vaish
ruby: converts sparse memory stats to gem5 style
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2013-09-05
Andreas Hansson
sim: Fix clang warning for unused variable
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2013-09-04
Andreas Hansson
util: Add ini string as tooltip info in dot output
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2013-09-04
Andreas Hansson
util: Add colours to the dot output
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2013-09-04
Andreas Hansson
util: Add class name to dot graph and output to svg
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2013-09-04
Andreas Hansson
tests: Move ISA-independent tests to the NULL ISA
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2013-09-04
Andreas Hansson
arch: Resurrect the NOISA build target and rename it...
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2013-09-04
Andreas Hansson
cpu: Move the branch predictor out of the BaseCPU
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2013-09-04
Andreas Hansson
arch: Header clean up for NOISA resurrection
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2013-09-04
Andreas Hansson
alpha: Move system virtProxy to Alpha only
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2013-09-04
Andreas Hansson
scons: Enable build on OSX
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2013-08-26
Ali Saidi
ARM: Fix configuration files for bare-metal binaries.
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2013-08-24
Steve Reinhardt
stats: update eio stats
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2013-08-22
Steve Reinhardt
util/regress: set --no-lto on regressions
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2013-08-20
Nilay Vaish
stats: update ruby.stats, config.ini files for x86...
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2013-08-20
Nilay Vaish
ruby: add option for number of transitions per cycle
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2013-08-20
Andreas Hansson
cpu: Fix timing CPU isDrained comment formatting
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2013-08-20
Andreas Hansson
base: Fix VectorPrint initialisation
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2013-08-19
Andreas Hansson
stats: Cumulative stats update
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2013-08-19
Lena Olson
cpu: Accurately count idle cycles for simple cpu
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2013-08-19
Andreas Hansson
config: Command line support for multi-channel memory
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2013-08-19
Andreas Hansson
mem: Change AbstractMemory defaults to match the common...
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2013-08-19
Sascha Bischoff
cpu: Fix TrafficGen trace playback
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2013-08-19
Andreas Hansson
mem: Use STL deque in favour of list for DRAM queues
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2013-08-19
Andreas Hansson
mem: Perform write merging in the DRAM write queue
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2013-08-19
Amin Farmahini
mem: Replacing bytesPerCacheLine with DRAM burstLength...
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2013-08-19
Andreas Hansson
cpu: Fix timing CPU drain check
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2013-08-19
Andreas Hansson
alpha: Check interrupts before quiesce
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2013-08-19
Sascha Bischoff
stats: Fix issue when printing 2D vectors
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2013-08-19
Akash Bagdia
power: Add voltage domains to the clock domains
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2013-08-19
Andreas Hansson
config: Move the memory instantiation outside FSConfig
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2013-08-19
Andreas Hansson
mem: Warn instead of panic for tXAW violation
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2013-08-19
Andreas Hansson
mem: Allow disabling of tXAW through a 0 activation...
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2013-08-19
Andreas Hansson
mem: Add an internal packet queue in SimpleMemory
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2013-08-19
Andreas Hansson
cpu: Fix a bug in the O3 CPU introduced by the cache...
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2013-08-14
Anthony Gutierrez
arm: use -march when compiling m5op_arm.S
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2013-08-07
Nilay Vaish
ruby: slicc: remove double trigger, continueProcessing
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2013-08-07
Nilay Vaish
ruby: slicc: move some code to AbstractController
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2013-08-07
Nilay Vaish
x86: add tlb checkpointing
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2013-07-19
Andreas Sandberg
cpu: Remove unused getBranchPred() method from BaseCPU
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2013-07-18
Joel Hestness
Configs: Fix up maxtick and maxtime
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2013-07-18
Andreas Hansson
config: Update script to set cache line size on system
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2013-07-18
Andreas Hansson
mem: Set the cache line size on a system level
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2013-07-18
Xiangyu Dong
mem: Add cache class destructor to avoid memory leaks
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2013-07-18
Andreas Hansson
scons: Use python-config instead of distutils
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2013-07-18
Andreas Hansson
sim: Make MaxTick in Python match the one in C++
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2013-07-15
Deyuan Guo
loader: Load weak symbols for function tracing
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2013-07-15
Umesh Bhaskar
debug : Fixes the issue wherein Debug symbols were...
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2013-07-12
Steve Reinhardt
dev: make BasicPioDevice take size in constructor
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2013-07-12
Steve Reinhardt
dev: consistently end device classes in 'Device'
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2013-07-12
Steve Reinhardt
dev/arm: get rid of AmbaDev namespace
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2013-07-12
Steve Reinhardt
devices: make more classes derive from BasicPioDevice
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2013-07-11
Brad Beckmann
ruby: removed the very old double trigger hack
stable_2013_10_14
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2013-07-02
Nilay Vaish
regressions: update a couple stats.txt
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2013-07-02
Nilay Vaish
regressions: update a couple of configs
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2013-06-29
Nilay Vaish
ruby: append transition comment only when in opt/debug
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2013-06-29
Nilay Vaish
configs: rearrange the available options in Options.py
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2013-06-29
Nilay Vaish
ruby: network: remove reconfiguration code
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2013-06-29
Nilay Vaish
ruby: check for compatibility between mem size and...
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2013-06-27
Andreas Hansson
stats: Update stats for monitor, cache and bus changes
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2013-06-27
Prakash Ramrakhyani
mem: Reorganize cache tags and make them a SimObject
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2013-06-27
Andreas Hansson
mem: Remove the cache builder
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2013-06-27
Andreas Hansson
config: Remove Clock parameter multiplication
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2013-06-27
Akash Bagdia
sim: Add the notion of clock domains to all ClockedObjects
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2013-06-27
Andreas Hansson
config: Add a BaseSESystem builder for re-use in regres...
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2013-06-27
Akash Bagdia
config: Rename clock option to Ruby clock
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2013-06-27
Akash Bagdia
config: Add a system clock command-line option
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2013-06-27
Akash Bagdia
config: Add a CPU clock command-line option
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2013-06-27
Akash Bagdia
config: Remove redundant explicit setting of default...
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2013-06-27
Andreas Hansson
tests: Prune 00.gzip from the regressions
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2013-06-27
Andreas Hansson
mem: Tidy up the bridge with const and additional checks
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2013-06-27
Andreas Hansson
mem: Fix CommMonitor style and response check
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2013-06-27
Andreas Hansson
mem: Align cache timing to clock edges
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