openpower-isa.git
2022-09-23 Jacob Lifshayadd pcdec -- doesn't yet work due to broken ISACaller...
2022-09-23 Jacob Lifshayfix maddld pseudo-code
2022-09-23 Jacob Lifshayadd missing minor_4 decoder
2022-09-23 Jacob Lifshayfix 'write reg ' log call
2022-09-23 Jacob Lifshayadd RC input to isa/caller.py
2022-09-23 Jacob Lifshayformat code
2022-09-23 Jacob Lifshaymaddhd[u]/maddld are official ops
2022-09-23 Jacob Lifshayformat code
2022-09-22 Luke Kenneth... add first (correctly-working) ctr-mode sv.bc test
2022-09-22 Luke Kenneth... comment need for waiting on binutils update
2022-09-22 Konstantinos... fix no of iterations in comment, harmless but wrong
2022-09-22 Konstantinos... dump memory
2022-09-22 Konstantinos... better handling of memory copies, fix vpx_get4x4sse_cs_...
2022-09-22 Konstantinos... remove extra setvl instruction
2022-09-21 Luke Kenneth... add series of double-stride options to test_caller_svp6...
2022-09-21 Luke Kenneth... do not set striding on costables, keep them contiguous.
2022-09-21 Konstantinos... getting better, get rid of the ctr, group src/ref loads
2022-09-21 Luke Kenneth... scale-up svshape pseudo-code for striding in DCT/FFT
2022-09-21 Luke Kenneth... fix dct/fft test-functions with new "scaling" parameter
2022-09-21 Luke Kenneth... missed setting zdim in svshape on DCT modes
2022-09-21 Konstantinos... use sv.subf
2022-09-21 Konstantinos... fix braces
2022-09-21 Luke Kenneth... whoops stride already has +1 from SVSTATE class
2022-09-21 Luke Kenneth... add SVzd to REMAP (svshape) "stride"
2022-09-21 Luke Kenneth... add stride-multiplier for 2D DCT/FFT "in-place" offsets
2022-09-21 Konstantinos... Initial SVP64 attempt to vpx_get4x4sse_cs_svp64_real()
2022-09-21 Konstantinos... use mr instead of li/addi pair
2022-09-21 Konstantinos... fix comments
2022-09-21 Konstantinos... add vpx_get4x4sse_cs_svp64_real() and wrapper
2022-09-21 Konstantinos... First form of fully working SVP64 version
2022-09-21 Konstantinos... reduce number of iterations in test, as it takes too...
2022-09-21 Konstantinos... necessary changes for run_a_simulation to work with...
2022-09-21 Konstantinos... Initial attempt for SVP64 asm version of vpx_get_mb_ss_...
2022-09-21 Luke Kenneth... add sv.madd* to sv_analysis
2022-09-21 Jacob Lifshayadd sv.maddld test case
2022-09-20 Luke Kenneth... minor codemorph, whitespace
2022-09-20 Luke Kenneth... sv.bc reclassified as RM-2P-1S by eliminating SPRs.
2022-09-20 Konstantinos... PoC simplified and isolated unit test for libvpx (VP8...
2022-09-20 Konstantinos... Initial PoC for calling pypowersim from within C code
2022-09-20 Luke Kenneth... remove messy string identification, use RM Mode from...
2022-09-20 Luke Kenneth... add quick test and loooong test of pysvp64dis - branche...
2022-09-20 Dmitry Selyutinpysvp64asm: fix sz handling
2022-09-20 Dmitry Selyutinpower_insn: unify predicates
2022-09-20 Dmitry Selyutintest_pysvp64dis: test vli specifier
2022-09-20 Dmitry Selyutinpysvp64asm: support vli specifier
2022-09-20 Dmitry Selyutinpower_insn: support vli specifier
2022-09-20 Dmitry Selyutinpower_insn: simplify specifiers sorting
2022-09-20 Luke Kenneth... missed one sorting order in test_pysvp64dis.py
2022-09-20 Luke Kenneth... sort specifiers in pysvp64dis in lexicographical order
2022-09-20 Luke Kenneth... add two extra tests, sv.bc/m=r3/sz
2022-09-20 Dmitry Selyutinpower_insn: custom sz handling for branches
2022-09-20 Dmitry Selyutinpysvp64asm: update sz upon snz specifier
2022-09-20 Luke Kenneth... add sv.bc/ctr/vsb unit test to test_pysvp64dis.py to...
2022-09-20 Dmitry Selyutinpower_insn: support vs/vsi/vsb/vsbi/ctr/cti specifiers
2022-09-20 Dmitry Selyutinpysvp64asm: support branch modes
2022-09-20 Dmitry Selyutinpower_svp64_rm: sync it with tables
2022-09-20 Dmitry Selyutinpower_insn: support common branch disassembly
2022-09-19 Dmitry Selyutinpower_insn: simplify branch table
2022-09-19 Dmitry Selyutinpower_insn: provide SVL/CTR branch fields
2022-09-19 Luke Kenneth... add bc_ctr and bc_cti but not used yet
2022-09-19 Luke Kenneth... print out reg num in _check_regs, useful debug
2022-09-19 Dmitry Selyutintest_pysvp64dis: test els specifier
2022-09-19 Dmitry Selyutinpower_insn: support els specifier
2022-09-19 Luke Kenneth... cut cruft in caller.py
2022-09-19 Luke Kenneth... codemorph on rc handling
2022-09-19 Luke Kenneth... codemorph
2022-09-19 Luke Kenneth... first interation (ha ha) src/dst iterators for ISACaller
2022-09-19 Luke Kenneth... codemorph reduce indentation
2022-09-19 Luke Kenneth... code cleanup on ISACaller write_output
2022-09-19 Luke Kenneth... rename to avoid conflict pred_dz from pred_dst_zero
2022-09-19 Luke Kenneth... another code-morph splitting out the src/dst mask prepa...
2022-09-19 Luke Kenneth... add function for calling a simulation
2022-09-19 Luke Kenneth... another code-morph working towards getting the predicat...
2022-09-19 Luke Kenneth... whitespace
2022-09-19 Luke Kenneth... code-morph in StepLoop work towards splitting into...
2022-09-19 Luke Kenneth... add svstate param to constructor of StepLoop, ISACaller
2022-09-19 Luke Kenneth... move two big step/loop functions into separate class...
2022-09-18 Dmitry Selyutinpower_insn: perform cleanup; turn comments into docstrings
2022-09-18 Luke Kenneth... code-comments identifying tables
2022-09-18 Luke Kenneth... simplify predicate mask reporting. assign dw=sw=mask...
2022-09-18 Luke Kenneth... use widths.get(dw/sw) and test empty/non-empty after.
2022-09-18 Luke Kenneth... fix predicate mask case when smask was zero but mmode...
2022-09-18 Luke Kenneth... no, better than hack-job, stop CROpSimpleRM deriving...
2022-09-18 Luke Kenneth... bit of a hack-job, a base class MRBaseRM - MapReduce...
2022-09-18 Luke Kenneth... correct COopFF3RM and CRopSimpleRM: extra sz field...
2022-09-18 Dmitry Selyutinpower_insn: introduce common mr/mrr RM class
2022-09-18 Dmitry Selyutinpower_insn: support ff/pr predicates
2022-09-18 Dmitry Selyutinpysvp64asm: restore original BO
2022-09-18 Dmitry Selyutinpower_insn: fix CR ops classes naming
2022-09-18 Dmitry Selyutinpower_insn: fix coding style
2022-09-18 Dmitry Selyutinpower_insn: introduce common dz/sz RM classes
2022-09-18 Dmitry Selyutinpower_insn: introduce common zz RM class
2022-09-18 Dmitry Selyutinpower_insn: introduce common Sat RM class
2022-09-18 Dmitry Selyutinpower_insn: introduce common FFPRRc0 RM class
2022-09-18 Dmitry Selyutinpower_insn: simplify RM classes naming
2022-09-18 Luke Kenneth... add first attempt at swapping inner/outer vl/subvl...
2022-09-18 Luke Kenneth... add new svstep mode setting up pack/unpack
2022-09-18 Luke Kenneth... sigh, check length of string returned, if non-zero...
2022-09-18 Luke Kenneth... sort out CR RM Mode (sz/dz bits moved, consistent)
2022-09-18 Luke Kenneth... add comments (links to URLs) into power_insns.py for...
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