ls2.git
2022-03-24 Luke Kenneth... increase delay on ECP5 ulx3s
2022-03-24 Luke Kenneth... check ulx3s, add CRG support for ulx3s
2022-03-24 Luke Kenneth... establish power-on reset stabilisation for Arty A7...
2022-03-22 Luke Kenneth... add hack to modify VERSA_ECP5 85F platform to speed...
2022-03-22 Luke Kenneth... adding hyperram for arty a7 and also adding a workaroun...
2022-03-20 Luke Kenneth... add microwatt hello_world source
2022-03-20 Luke Kenneth... crank A7 FPGA speed down to experiment
2022-03-20 Luke Kenneth... code-comments
2022-03-20 Luke Kenneth... fix Arty A7-100t PLL with quick demo
2022-03-20 Luke Kenneth... first cut at Arty A7 Clock-Reset-Generator with S7 PLL
2022-03-20 Luke Kenneth... beginnings of arty a7 clock-reset-generator
2022-03-19 Luke Kenneth... add VERSA_ECP5 85F custom board
2022-03-19 Luke Kenneth... move quick read/write test for hyperram in coldboot.c
2022-03-19 Luke Kenneth... set IO_TYPE 3.3v attribute on HyperRAM not IOSTANDARD
2022-03-19 Luke Kenneth... correct pin names for HyperRAMResource, indent spi0...
2022-03-19 Luke Kenneth... fixed hyperram pin names which was stopping verilator...
2022-03-19 Luke Kenneth... disable hyperram for now (under investigation)
2022-03-19 Luke Kenneth... adding in hyperram peripheral
2022-03-18 Luke Kenneth... whitespace / module-import / comments / tidyup
2022-03-18 Luke Kenneth... beginning to add hyperram module
2022-03-18 Luke Kenneth... whitespace cleanup and make SPI core (temporarily)...
2022-03-17 Luke Kenneth... work-in-progress on DDR3 firmware. sigh
2022-03-17 Luke Kenneth... comment about icarus verilog to speed up simulations
2022-03-16 Raptor Engineering... Add initial Tercel SPI controller
2022-03-10 Luke Kenneth... sigh gramWishbone is not WB4-pipeline-burst-compliant
2022-03-09 Luke Kenneth... fix WB6to32 downconverter with stall signalling
2022-03-09 Luke Kenneth... add stall signal to arbiter, assume nmigen-soc takes
2022-03-04 Luke Kenneth... add experimental stall-capable 64-to-32 wishbone converter
2022-03-02 Luke Kenneth... lots of comments in the yosys script file
2022-03-02 Luke Kenneth... invert reset and chip-select on dram, and initialise...
2022-03-02 Luke Kenneth... forgot to include firmware in build for new icarus...
2022-03-01 Luke Kenneth... add new icarus-versa-ecp5 platform in ls2.py
2022-02-28 Luke Kenneth... increase timescale of icarus simulation
2022-02-28 Luke Kenneth... fix undefined uart_tx in icarus simulation, icarus...
2022-02-28 Luke Kenneth... use a slightly different yosys initialisation sequence...
2022-02-28 Luke Kenneth... fix memory issue in yosys synth for icarus
2022-02-28 Luke Kenneth... add icarus simulation of ls2 with DDR3 and ECP5 models
2022-02-23 Luke Kenneth... invert CRG reset on PLL see if it makes any difference
2022-02-23 Luke Kenneth... add comments about DRAM sync clock being identical...
2022-02-22 Luke Kenneth... xdr=4 missing on ddr3 platform request for VERSA_ECP5
2022-02-21 Luke Kenneth... lengthen cdelay pauses by a factor of 10
2022-02-21 Luke Kenneth... * use readl and writel for accessing memory
2022-02-21 Luke Kenneth... use microwatt mmu powerpc.lds with better stack space
2022-02-20 Luke Kenneth... fix dfi initialisation and calibration to use
2022-02-20 Luke Kenneth... set RAM base to #defined DRAM_BASE not hard-coded value
2022-02-20 Luke Kenneth... for simulatio keep the simulated dram in the
2022-02-20 Luke Kenneth... add fake (sim) DRAM from gram library
2022-02-19 Luke Kenneth... match up dram initialisation parameters
2022-02-19 Luke Kenneth... put together coldboot startup firmware
2022-02-19 Luke Kenneth... hm -abc9 seems to be working, and without -nowidelut
2022-02-18 Luke Kenneth... add DRAM class to DDR3Soc
2022-02-18 Luke Kenneth... add FPGA argument to DDR3SoC
2022-02-18 Luke Kenneth... add microwatt console lib and #includes
2022-02-18 Luke Kenneth... make cpu optional (test purposes), make bios optional,
2022-02-16 Luke Kenneth... remove minerva cpu
2022-02-16 Luke Kenneth... drop clock frequency to 25 mhz and disable abc9 (it...
2022-02-16 Luke Kenneth... add openocd load command for ecp5
2022-02-16 Luke Kenneth... wildcards never ok. update comments
2022-02-16 Luke Kenneth... add copyright notices
2022-02-16 Luke Kenneth... update ECP5 PLL to accept parameters for setting arbitr...
2022-02-16 Luke Kenneth... add start of README as reminder
2022-02-16 Luke Kenneth... * add uart_pins to UART16550 peripheral so they get...
2022-02-16 Luke Kenneth... * disable DDR3 for now
2022-02-15 Luke Kenneth... connect up stall signals (fake) for WB Classic compliance
2022-02-15 Luke Kenneth... alternative uart wishbone mapping which just takes...
2022-02-15 Luke Kenneth... attempt to do 8-bit downconvert on wishbone bus for...
2022-02-15 Luke Kenneth... correct syscon bus address to 0xC000_0000
2022-02-15 Luke Kenneth... add microwatt SYSCON peripheral at 0xc000_0000
2022-02-15 Luke Kenneth... increase size of bootmem
2022-02-15 Luke Kenneth... add interrupt controller module, remove stall feature...
2022-02-15 Luke Kenneth... FLGA_TARGET=verilator not uppercase
2022-02-14 Luke Kenneth... add external cpu
2022-02-14 Luke Kenneth... convert boot rom to bootmem and get first hello_world...
2022-02-14 Luke Kenneth... add IBM microwatt CC4 license and copyright notices
2022-02-14 Luke Kenneth... add first cut of verilator simulation, over from microwatt
2022-02-14 Luke Kenneth... add verilog build option, make DDR3 PHY optional, add...
2022-02-13 Luke Kenneth... add future sim option (needs Simulated DDR PHY)
2022-02-13 Luke Kenneth... add build to gitignore
2022-02-13 Luke Kenneth... rename examples to src
2022-02-13 Luke Kenneth... not for any good reason, separate adding the uart16550...
2022-02-13 Luke Kenneth... add MemoryMap to UART16550 (TODO, put that into UART165...
2022-02-13 Luke Kenneth... start adding uart16550
2022-02-13 Luke Kenneth... select a firmware file
2022-02-13 Luke Kenneth... allow selection of alternative FPGAs at commandline
2022-02-13 Luke Kenneth... add blinky lights so we know FPGA is alive
2022-02-13 Luke Kenneth... make firmware and cpu optional for now to get a basic...
2022-02-12 Luke Kenneth... begin a tidyup on the example
2022-02-10 Luke Kenneth... resolve imports, whitespace, add Copyright
2022-02-10 Luke Kenneth... add crg.py
2022-02-10 Luke Kenneth... update contributors
2022-02-10 Luke Kenneth... sort out license and headers for NLnet and NGI POINTER...
2022-02-10 Luke Kenneth... add gram soc example and license and contributors
2022-02-09 Luke Kenneth... empty first commit