2018-01-08 |
Tony Gutierrez | gpu-compute: call createThreads() on cpu objs in apu_se.py |
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2018-01-05 |
Tuan Ta | arch-riscv: Ignore sched_yield syscall in SE mode |
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2018-01-05 |
Tuan Ta | sim: Fix a bug in prlimit syscall in SE mode |
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2018-01-05 |
Tuan Ta | arch-riscv: Ignore set_robust_list and get_robust_list... |
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2018-01-05 |
Tuan Ta | arch-riscv: Add an implementation of set_tid_address... |
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2018-01-05 |
Alec Roelke | arch-riscv: Correct syscall argument reg count |
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2018-01-04 |
Alec Roelke | arch-riscv: Remove "magic" syscall number constant |
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2018-01-02 |
Gabe Black | config: Handle NULL simobject parameters in read_config.py. |
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2018-01-02 |
Gabe Black | config: Fix parsing AddrRange parameters in read_config.py. |
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2018-01-02 |
Gabe Black | config: Add a --checkpoint-dir argument to read_config.py. |
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2017-12-23 |
Gabe Black | alpha,arm,mips,power,riscv,sparc,x86: Get rid of TheISA... |
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2017-12-23 |
Gabe Black | riscv,x86: Stop using the arch Nop machine instruction... |
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2017-12-22 |
Gabe Black | arch,cpu: "virtualize" the TLB interface. |
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2017-12-22 |
Gabe Black | cpu: Use the generic nop static inst instead of decodin... |
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2017-12-22 |
Gabe Black | cpu: Add a pointer to a generic Nop StaticInst. |
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2017-12-21 |
Giacomo Travaglini | arch-arm: Fixed WFE/WFI trapping behaviour |
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2017-12-21 |
Giacomo Travaglini | arch-arm: Hyp routed undef fault need to change its... |
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2017-12-21 |
Giacomo Travaglini | arch-arm: Fix StaticInst encoding() method |
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2017-12-20 |
Gabe Black | cpu: Fix exit_gen.cc which used misc.hh instead of... |
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2017-12-19 |
Giacomo Travaglini | arch-arm: Instruction size methods in StaticInst class |
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2017-12-19 |
Giacomo Travaglini | arch-arm: Change casting type from reinterpret to static |
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2017-12-19 |
Riken Gohil | cpu-tester: Added ExitGen to TrafficGen |
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2017-12-19 |
Riken Gohil | cpu-tester: Refactoring traffic generators into separat... |
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2017-12-15 |
Swapnil Haria | mem-ruby: Support atomic_noncaching acceses in ruby |
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2017-12-14 |
Alec Roelke | arch-riscv: Define AT_RANDOM properly |
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2017-12-14 |
Alec Roelke | arch-riscv: Increase maximum stack size |
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2017-12-14 |
Jason Lowe... | misc: Updates for gcc7.2 for x86 |
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2017-12-14 |
Jason Lowe... | ext: Upgrade PyBind11 to version 2.2.1 |
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2017-12-14 |
Gabe Black | x86: Use operand size 4 when it would be 2 for cmpxchg8b. |
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2017-12-13 |
Andreas Sandberg | scons, tests: Fix occasional linking error |
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2017-12-13 |
Andreas Sandberg | scons, tests: Add support for GTest XML generation |
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2017-12-13 |
Andreas Sandberg | scons: Make sure GTests have the right environment... |
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2017-12-13 |
Gabe Black | arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64... |
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2017-12-13 |
Gabe Black | cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp... |
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2017-12-13 |
Gabe Black | x86: Rework how "split" loads/stores are handled. |
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2017-12-13 |
Gabe Black | base: Add endianness conversion functions for std:... |
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2017-12-12 |
Gabe Black | tests: Turn fbtest into a gtest and move it to src... |
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2017-12-12 |
Gabe Black | tests: Move the cprintftest unit test into src/base. |
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2017-12-12 |
Gabe Black | tests: Convert the cprintf unit test into a gtest. |
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2017-12-12 |
Gabe Black | tests: Move the trietest unit test into base. |
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2017-12-12 |
Gabe Black | tests: Plumb dumps of the test trie into the gtest... |
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2017-12-12 |
Gabe Black | tests: Convert the trie unit test into a gtest. |
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2017-12-12 |
Gabe Black | tests: Add an implementation of the Logger interface... |
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2017-12-12 |
Gabe Black | misc: Rework the logging functions. |
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2017-12-12 |
Austin Harris | config: Fix need to set ISA of switch cpus. |
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2017-12-08 |
Giacomo Travaglini | arm: Change access permission in TPIDRURO and TPIDRURW |
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2017-12-08 |
Matt Sinclair | x86,misc: add additional info on faulting X86 instructi... |
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2017-12-07 |
Gabe Black | tests: Accept SourceFilters as sources for GTest. |
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2017-12-07 |
Gabe Black | tests: Add a pseudo target to run all the unit tests... |
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2017-12-07 |
Alec Roelke | arch-riscv: Move compressed ops out of ISA |
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2017-12-06 |
Gabe Black | x86: Split apart x87's FSW and TOP, and add a missing... |
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2017-12-06 |
Jason Lowe... | misc: Update MAINTAINERS with learning-gem5 tag |
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2017-12-06 |
Gabe Black | base: Split out the pixel class in framebuffer.(cc... |
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2017-12-06 |
Gabe Black | base: Handle zero fill in cprintf when printing floats. |
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2017-12-06 |
Gabe Black | tests: Fix the source file for the cprintftime test. |
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2017-12-06 |
Gabe Black | scons: Several fixes having to do with tags and sets. |
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2017-12-06 |
Gabe Black | scons: Track and reuse object nodes for a given source... |
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2017-12-05 |
Gabe Black | x86: LOOP's operand size defaults to 64 bits in 64... |
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2017-12-05 |
Hanhwi Jang | learning-gem5: Fix missing misc.hh in hello_object.cc |
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2017-12-05 |
Nikos Nikoleris | arm: Add support for the dc {civac, cvac, cvau, ivac... |
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2017-12-05 |
Nikos Nikoleris | arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau... |
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2017-12-05 |
Nikos Nikoleris | mem-ruby: Prevent ruby from crashing on CMOs |
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2017-12-05 |
Nikos Nikoleris | arm: Add CMO support for Non-Cacheable memory |
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2017-12-05 |
Nikos Nikoleris | cpu: Add support for CMOs in the cpu models |
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2017-12-05 |
Nikos Nikoleris | mem: Ignore clean requests in the abstract memory |
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2017-12-05 |
Nikos Nikoleris | mem: Handle CMO responses in the snoop filter |
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2017-12-05 |
Nikos Nikoleris | mem: Allow CMOs as snooping requests in the snoop filter |
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2017-12-05 |
Nikos Nikoleris | mem: Co-ordination of CMOs in the xbar |
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2017-12-05 |
Nikos Nikoleris | mem: Add support for handling CMOs in the MSHRs |
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2017-12-05 |
Nikos Nikoleris | mem: Add support for CMOs in the cache |
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2017-12-05 |
Nikos Nikoleris | mem: Promote deferred targets only when the block is... |
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2017-12-05 |
Nikos Nikoleris | mem: Add support for cache maintenance operation requests |
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2017-12-05 |
Nikos Nikoleris | mem: Support for specifying the destination of a WriteClean |
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2017-12-05 |
Nikos Nikoleris | mem: Add support for WriteClean packets in the memory... |
commit | commitdiff | tree |
2017-12-05 |
Nikos Nikoleris | mem: Add a WriteClean command to the packet class |
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2017-12-05 |
Nikos Nikoleris | mem-cache: Add support for checking whether a cache... |
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2017-12-05 |
Nikos Nikoleris | mem: Add function to check if the slave can receive... |
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2017-12-05 |
Nikos Nikoleris | mem: Add the notion of point of unification in the... |
commit | commitdiff | tree |
2017-12-05 |
Éder F. Zulian | config, mem, hmc: fix HMC test script |
commit | commitdiff | tree |
2017-12-05 |
Jason Lowe... | learning_gem5: Adding code for SimpleCache |
commit | commitdiff | tree |
2017-12-05 |
Jason Lowe... | learning_gem5: Adds the simple MemObject code |
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2017-12-05 |
Jason Lowe... | learning_gem5: Add code for hello-goodbye example |
commit | commitdiff | tree |
2017-12-05 |
Jason Lowe... | learning_gem5: Add code for simple SimObject |
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2017-12-04 |
Gabe Black | base: Rework the trie dump function to accept a differe... |
commit | commitdiff | tree |
2017-12-04 |
Gabe Black | misc: Rename misc.(hh|cc) to logging.(hh|cc) |
commit | commitdiff | tree |
2017-12-04 |
Gabe Black | misc: Move the ExitLogger class definition into misc.cc |
commit | commitdiff | tree |
2017-12-04 |
Gabe Black | tests: Remove trietest's dependence on cprintf. |
commit | commitdiff | tree |
2017-12-04 |
Gabe Black | tests: Add a ptr helper function trietest. |
commit | commitdiff | tree |
2017-12-04 |
Gabe Black | tests: Get rid of the bitvectest unit test. |
commit | commitdiff | tree |
2017-12-01 |
Giacomo Travaglini | arm: Enable ns registers access in secure mode |
commit | commitdiff | tree |
2017-11-30 |
Alec Roelke | arch-riscv: use sext rather than manual masks |
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2017-11-30 |
Alec Roelke | arch-riscv: Remove spaces around ea_code |
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2017-11-29 |
Alec Roelke | arch-riscv: Add missing license paragraphs |
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2017-11-29 |
Andreas Sandberg | cpu: Don't override ISA if provided by user |
commit | commitdiff | tree |
2017-11-29 |
David Guillen... | cpu-minor: Add missing instruction stats |
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2017-11-29 |
Alec Roelke | arch-riscv: Remove static parts of AMOs out of ISA |
commit | commitdiff | tree |
2017-11-29 |
Alec Roelke | arch-riscv: Move parts of mem insts out of ISA |
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2017-11-29 |
Alec Roelke | arch-riscv: Move unknown out of ISA description |
commit | commitdiff | tree |
2017-11-29 |
Alec Roelke | arch-riscv: Move standard ops out of ISA |
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2017-11-28 |
Andreas Sandberg | cpu-o3: Add missing vector stat initializers |
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