soc.git
2021-12-15 Luke Kenneth... simplifying / tidyup of TestIssuer to get CoreState
2021-12-15 Luke Kenneth... sort out MSR, read/write in same way as PC/SVSTATE...
2021-12-15 Luke Kenneth... whoops accidentally commented out setup of instructions
2021-12-15 Luke Kenneth... get fetch_failed working with no MMU
2021-12-14 Tobias Platentest_loadstore1.py: test_loadstore1_ifetch_multi now...
2021-12-14 Luke Kenneth... trying to get TestIssuer FSM to respond correctly to...
2021-12-14 Luke Kenneth... get OP_FETCH_FAILED to respond/return an exception...
2021-12-14 Luke Kenneth... update wb_get memory with instructions if required
2021-12-14 Tobias Platenfix test_loadstore1_ifetch_multi() in test_loadstore1.py
2021-12-14 Tobias Platenwip test case for virtual address fetch using fetch...
2021-12-14 Tobias Platenfix test_loadstore1_ifetch_multi()
2021-12-14 Jonathan NeuschäferGitLab-CI: Increase clone depth
2021-12-14 Luke Kenneth... MMU LOOKUP for fetch failed, priv mode is inversion...
2021-12-14 Luke Kenneth... link MSR.PR into MMU FSM OP_FETCH_FAILED
2021-12-13 Luke Kenneth... return temporarily to older version of pinmux submodule
2021-12-13 Luke Kenneth... request a flush of icache to clear the instruction...
2021-12-13 Tobias Platentry to get multi test running
2021-12-13 Tobias Platencomments about test_loadstore1_ifetch()
2021-12-13 Luke Kenneth... fix test_loadstore1.py with MSR=PR/DR
2021-12-13 Luke Kenneth... set pr=0 because privileged mode is pr=0 not pr=1
2021-12-13 Luke Kenneth... add in missing MSRSpec import
2021-12-13 Luke Kenneth... commented-out code
2021-12-13 Tobias Platenupdate MMU PortInterface Test (misalign)
2021-12-13 Tobias Platencleanup test_ldst_pi.py
2021-12-13 Tobias Platenupdate old TestMicrowattMemoryPortInterface
2021-12-13 Tobias Platenreplace msr_pr with msr
2021-12-13 Tobias Platencleanup test_dcbz_pi.py
2021-12-13 Luke Kenneth... fix up pr/dr/sf in PortInterfaceBase
2021-12-13 Luke Kenneth... pass in new MSRSpec to test_loadstore1.py not msr_pr=1
2021-12-13 Luke Kenneth... convert PortInterfaceBase to pass msr not msr_pr
2021-12-13 Luke Kenneth... convert LoadStore1 to new msr.pr/dr/sf
2021-12-13 Luke Kenneth... add msr to MMU Op Subset record
2021-12-13 Tobias Platenuse NamedTuple pr in test_pi2ls
2021-12-13 Luke Kenneth... still have to import MSRSpec
2021-12-13 Luke Kenneth... connect up PortInterface priv_mode, virt_mode and mode_...
2021-12-13 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-12-13 Luke Kenneth... construct an MSRSpec in PortInterfaceBase (not used...
2021-12-13 Tobias Platenremove redundant MSRSpec from pimem
2021-12-13 Luke Kenneth... whoops wrong variable names
2021-12-13 Luke Kenneth... rename msr_pr to priv_mode in LDSTCompUnit
2021-12-13 Luke Kenneth... TODO comments about using MSRspec
2021-12-13 Luke Kenneth... change PortInterface naming to msr not msr_pr in set_wr...
2021-12-13 Tobias Platenadd namedtuple proposed by lkcl in chat
2021-12-13 Tobias Platenadd signals to port interface as descibed in bug 756
2021-12-13 Tobias Platenmore work on test_loadstore1_ifetch_multi()
2021-12-12 Luke Kenneth... set and reset instruction fault so it does not occur...
2021-12-12 Luke Kenneth... when an exception happens, if it is a fetch_failed...
2021-12-12 Luke Kenneth... delay MMU LOOKUP done by one clock so that the exceptio...
2021-12-12 Luke Kenneth... bring MMU exception out where AllFunctionUnits (and...
2021-12-12 Luke Kenneth... bring exception out from MMU FSM, correct "done"
2021-12-12 Luke Kenneth... add LDSTException output to MMU
2021-12-12 Luke Kenneth... drat, a test inverting the instruction made it into...
2021-12-12 Luke Kenneth... starting to hack in fetch failed (including OP_FETCH_FA...
2021-12-12 Luke Kenneth... print debugs established that when a wb_get memory...
2021-12-12 Luke Kenneth... set fetch_failed into PowerDecoder2 combinatorially
2021-12-12 Luke Kenneth... in a terrible botched way, get at I-Cache and set it up
2021-12-11 Luke Kenneth... fix bug in unit test, forgot that wb_get mem dict is...
2021-12-11 Luke Kenneth... get FetchUnitInterface I-Cache test working (sort-of)
2021-12-11 Luke Kenneth... comment out broken test
2021-12-11 Luke Kenneth... whoops forgot to add pspec
2021-12-11 Tobias Platentypo fix, add missing stop statement to _test_loadstore...
2021-12-11 Tobias Platenadd loop with multiple instructions for testing
2021-12-11 Tobias Platenadd skeleton for test_loadstore1_ifetch_multi()
2021-12-11 Luke Kenneth... add start of test_loadstore1_ifetch_unit_interface()
2021-12-11 Luke Kenneth... connect up I-Cache to FetchUnitInterface
2021-12-11 Luke Kenneth... add new ConfigFetchUnit option "mmu_cache_wb" which...
2021-12-10 Jacob Lifshayadd ternlogi to shift_rot formal test
2021-12-10 Jacob Lifshayfix shift_rot formal proof
2021-12-10 Jacob Lifshayadd formal_test_temp to .gitignore
2021-12-10 Tobias Platenuse icache_read in one place
2021-12-10 Tobias Platentest_loadstore1.py: begin code deduplication
2021-12-09 Luke Kenneth... add some examination of the failed-fetched instruction
2021-12-09 Luke Kenneth... add some debug string info to gtkwave
2021-12-09 Tobias Platenimplement main part of test_loadstore1_ifetch_invalid()
2021-12-09 Tobias Platencleanup test_loadstore1.py
2021-12-09 Luke Kenneth... add I-Cache to FSM local variables
2021-12-09 Luke Kenneth... wire fetch_failed from I-Cache to PowerDecoder2
2021-12-09 Luke Kenneth... make icache accessible to core, working back to TestIssuer
2021-12-09 Luke Kenneth... include SPR.TB in SPR FU
2021-12-09 Jacob Lifshayadd bitmanip tests
2021-12-09 Jacob Lifshayadd CommonPipeSpec.__getattr__ to forward attributes...
2021-12-09 Jacob Lifshayadd parent_pspec everywhere
2021-12-09 Jacob Lifshaymake argv handling more flexible
2021-12-09 Jacob Lifshayformat code
2021-12-08 Luke Kenneth... got fed up of staring at magic constants in the MMU
2021-12-08 Luke Kenneth... add special pagetable to ifetch_invalid with execute...
2021-12-08 Luke Kenneth... do not try priv_mode on the instruction fetch (not...
2021-12-08 Luke Kenneth... add an example pagetable where executable permission...
2021-12-08 Tobias Platenbegin working on _test_loadstore1_ifetch_invalid()...
2021-12-08 Tobias Platenmore work on test_loadstore1_ifetch_invalid()
2021-12-08 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-12-08 Tobias Platenadd skeleton for test_loadstore1_ifetch_invalid()
2021-12-08 Luke Kenneth... check that no exception occurs in the virtual-memory...
2021-12-08 Luke Kenneth... add OP_FETCH_FAILED to MMU Function Unit
2021-12-08 Luke Kenneth... make LoadStore1 intsr_fault a "captured flag" - strictl...
2021-12-08 Luke Kenneth... remove MSR and add CIA to MMU Input Record
2021-12-08 Luke Kenneth... add instr_fault to LoadStore1 FSM
2021-12-08 Luke Kenneth... add new PortInterfaceBase external_busy() option
2021-12-08 Jacob Lifshayadd comment about draft instructions
2021-12-08 Jacob Lifshayaccount for Mock absurdities
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