| 2022-09-18 |
Dmitry Selyutin | power_insn: support ew specifier |
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| 2022-09-18 |
Dmitry Selyutin | power_insn: simplify subvl disassembly |
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| 2022-09-17 |
Luke Kenneth... | add sat/satu test_12_sat to test_pysvp64dis.py |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: fix sat checks |
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| 2022-09-17 |
Dmitry Selyutin | pysvp64asm: SVP64 instruction debug logs |
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| 2022-09-17 |
Luke Kenneth... | whoops. mode-bits need to be put in MSB0 order. sigh |
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| 2022-09-17 |
Dmitry Selyutin | power_fields: fix mapping class accessor |
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| 2022-09-17 |
Dmitry Selyutin | power_fields: support boolean checks |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: fix zz specifiers |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: drop field length method again |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: decouple base ld/st idx RM |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: decouple base ld/st imm RM |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: decouple base normal RM |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: support saturation mode |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: support dz/sz specifiers |
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| 2022-09-17 |
Luke Kenneth... | add zz mode to sv/trans/svp64.py as a hack |
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| 2022-09-17 |
Luke Kenneth... | remove sv.setvl/pk/up/pu - these are all gone in favour... |
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| 2022-09-17 |
Luke Kenneth... | add MASK_SRC to power_insn.py (SVmask_src from enums) |
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| 2022-09-17 |
Luke Kenneth... | add SVmask_src enum, rename fields to EN and NO to... |
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| 2022-09-17 |
Luke Kenneth... | as a double-check sv_analysis new CSV column "SM" was... |
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| 2022-09-17 |
Luke Kenneth... | add a "SM" column into RM*.csv (and LDSTRM*.csv) identi... |
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| 2022-09-17 |
Luke Kenneth... | add sv.add/ew=XX test to test_pysvp64dis.py |
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| 2022-09-17 |
Luke Kenneth... | remove pack/unpack modes from power_insn.py, they no... |
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| 2022-09-17 |
Dmitry Selyutin | selectable_int: drop redundant operators |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: support vec2/vec3/vec4 |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: support specifiers |
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| 2022-09-17 |
Dmitry Selyutin | power_fields: fix comparison operators |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: refactor and fix RM mappings |
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| 2022-09-17 |
Dmitry Selyutin | power_fields: fix field slicing |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: fix mapping bits accessors |
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| 2022-09-17 |
Dmitry Selyutin | power_fields: support traversing over instances |
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| 2022-09-17 |
Dmitry Selyutin | power_insn: drop redundant table |
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| 2022-09-17 |
Dmitry Selyutin | power_fields: inherit docstrings upon remap |
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| 2022-09-17 |
Luke Kenneth... | add vec2/3/4 test_pysvp64dis test |
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| 2022-09-16 |
Luke Kenneth... | comments on test_9_fptrans |
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| 2022-09-16 |
Dmitry Selyutin | test_power_decoder: mark minor_19.csv as opint |
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| 2022-09-16 |
Dmitry Selyutin | test_pysvp64dis: test fptrans |
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| 2022-09-16 |
Dmitry Selyutin | selectable_int: replace bit_count with bit_length |
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| 2022-09-16 |
Dmitry Selyutin | sv_binutils_fptrans: adopt script for reuse |
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| 2022-09-16 |
Dmitry Selyutin | power_insn: postpone updating per-instruction operands |
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| 2022-09-15 |
Dmitry Selyutin | power_insn: perform faster PPC database lookups |
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| 2022-09-15 |
Dmitry Selyutin | sv_binutils_fptrans: fix disassembly |
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| 2022-09-15 |
Dmitry Selyutin | sv_binutils_fptrans: fptrans binutils generator |
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| 2022-09-15 |
Dmitry Selyutin | power_insn: support instruction bytes conversion |
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| 2022-09-15 |
Dmitry Selyutin | selectable_int: allow setting multiple bit |
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| 2022-09-15 |
Dmitry Selyutin | power_insn: allow accessing instruction bits |
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| 2022-09-15 |
Luke Kenneth... | add minor_4.csv for maddld/maddhdu/maddhd and to insn_d... |
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| 2022-09-15 |
Luke Kenneth... | fix sprset mtspr/mfspr pseudocode with wrong definition of |
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| 2022-09-14 |
Jacob Lifshay | add svp64 fptrans tests |
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| 2022-09-14 |
Jacob Lifshay | include *all* fprs/gprs/cr-fields in SimState |
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| 2022-09-14 |
Jacob Lifshay | fix sv_analysis for fpown and frootn |
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| 2022-09-14 |
Jacob Lifshay | fix some typos |
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| 2022-09-13 |
Dmitry Selyutin | power_insn: support signed operands |
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| 2022-09-13 |
Dmitry Selyutin | power_insn: support branch RM |
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| 2022-09-13 |
Dmitry Selyutin | power_insn: support CR RM |
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| 2022-09-13 |
Dmitry Selyutin | power_enums: convert SVExtra to RegType |
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| 2022-09-13 |
Dmitry Selyutin | power_insn: refactor RM mapping |
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| 2022-09-13 |
Dmitry Selyutin | sv_binutils: support multiple opcodes; minor fixes |
commit | commitdiff | tree |
| 2022-09-13 |
Luke Kenneth... | correct assrmbler in test_pysvpy4dis.py |
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| 2022-09-13 |
Jacob Lifshay | fix X-FORM lines for fptrans -- I forgot Rc |
commit | commitdiff | tree |
| 2022-09-13 |
Jacob Lifshay | add missing X-FORM lines for fptrans |
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| 2022-09-13 |
Jacob Lifshay | add comment that fptrans test cases output values are... |
commit | commitdiff | tree |
| 2022-09-13 |
Jacob Lifshay | add new fptrans unit tests |
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| 2022-09-13 |
Jacob Lifshay | add fptrans support to isa caller |
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| 2022-09-13 |
Jacob Lifshay | add fp support to TestRunnerBase |
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| 2022-09-13 |
Luke Kenneth... | add first pack/unpack to ISACaller |
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| 2022-09-13 |
Luke Kenneth... | add setter/getter properties to SVP64State, minor code... |
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| 2022-09-13 |
Luke Kenneth... | remove pack/unpack from SVP64RMModeDecode, it is now... |
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| 2022-09-13 |
Luke Kenneth... | add batch of instructions from |
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| 2022-09-12 |
Luke Kenneth... | add hack overloaded meaning of destwid to be pack/unpack. |
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| 2022-09-12 |
Dmitry Selyutin | power_insn: refactor RM mapping |
commit | commitdiff | tree |
| 2022-09-12 |
Dmitry Selyutin | sv_binutils: support multiple opcodes; minor fixes |
commit | commitdiff | tree |
| 2022-09-12 |
Dmitry Selyutin | power_insn: call sv_spec_leave unconditionally |
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| 2022-09-12 |
Dmitry Selyutin | power_enums: consider CRIn2Sel |
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| 2022-09-12 |
Dmitry Selyutin | power_insn: fix RCOE check |
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| 2022-09-12 |
Dmitry Selyutin | power_insn: introduce pseudo cr_in2 |
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| 2022-09-12 |
Dmitry Selyutin | power_enums: strict selectors conversion |
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| 2022-09-12 |
Dmitry Selyutin | power_insn: fix typo |
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| 2022-09-12 |
Dmitry Selyutin | power_insn: support BRANCH and CR mode stubs |
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| 2022-09-12 |
Dmitry Selyutin | power_insn: refactor register operands |
commit | commitdiff | tree |
| 2022-09-12 |
Jacob Lifshay | add pseudocode for all fptrans ops |
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| 2022-09-12 |
Jacob Lifshay | add fptrans helpers, switching existing uses to new... |
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| 2022-09-12 |
Luke Kenneth... | add hphint and pack/unpack into SVSTATE SPR layout |
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| 2022-09-12 |
Jacob Lifshay | add fptrans ops to src/openpower/sv/trans/svp64.py |
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| 2022-09-12 |
Jacob Lifshay | add rest of new fptrans ops to CSVs |
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| 2022-09-12 |
Luke Kenneth... | remove pack/unpack - now part of sv.setvl |
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| 2022-09-12 |
Luke Kenneth... | add rudimentary sv.setvl unit test to just check that... |
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| 2022-09-12 |
Luke Kenneth... | add sv.setvl to instructions as a major hack |
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| 2022-09-12 |
Luke Kenneth... | split out setvl from sv.setvl test in test_pysvp64dis.py |
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| 2022-09-12 |
Luke Kenneth... | add extra tests "add." "addo" etc. to test_pysvp64dis.py |
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| 2022-09-12 |
Luke Kenneth... | demo that "setvl." is not reconstructed with Rc=1 mode |
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| 2022-09-12 |
Luke Kenneth... | some weird moving of opcodes around, probably because... |
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| 2022-09-12 |
Luke Kenneth... | skip addpcis for now, needs properly qualifying |
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| 2022-09-12 |
Jacob Lifshay | fix svanalysis failing due to missing comma in addpcis... |
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| 2022-09-11 |
Luke Kenneth... | add new CRIn2Sel for later, for getting rid of CRInSel... |
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| 2022-09-11 |
Luke Kenneth... | BFT does not exist |
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| 2022-09-11 |
Luke Kenneth... | add sv.isel 12,2,3,*99 test to test_pysvp64dis.py |
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| 2022-09-11 |
Luke Kenneth... | add some CR3 pysvp64dis.py tests, sv.crand |
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| 2022-09-11 |
Dmitry Selyutin | power_insn: check exact matches directly in set |
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| 2022-09-11 |
Dmitry Selyutin | power_insn: group opcodes and names |
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