2022-07-27 |
Jacob Lifshay | add another test and fix broken fishmv pseudocode |
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2022-07-27 |
Luke Kenneth... | add extra fmvis to see what is going on |
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2022-07-27 |
Konstantinos... | Fix fmvis & fishmv bit handling for d0, add tests for... |
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2022-07-27 |
Konstantinos... | Add fishmv instruction (bug #887) |
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2022-07-27 |
Konstantinos... | fix wrong shift in fmvis, use correct immediates in... |
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2022-07-26 |
Luke Kenneth... | update comments in fmvis case |
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2022-07-26 |
Luke Kenneth... | add first FP "expected state" use it in fmvis |
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2022-07-26 |
Luke Kenneth... | bit more docs on fmvis |
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2022-07-26 |
Luke Kenneth... | off-by-one in declaration of pattern-match XO for fmvis |
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2022-07-26 |
Luke Kenneth... | add some more example fmvis to work out which is LSB... |
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2022-07-26 |
Luke Kenneth... | add example fmvis instruction to trans/svp64.py |
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2022-07-26 |
Luke Kenneth... | dang. |
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2022-07-26 |
Luke Kenneth... | Revert "set IN1 to NONE for fmvis", in1 is FRS. |
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2022-07-26 |
Luke Kenneth... | use DOUBLE helper function in fmvis |
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2022-07-26 |
Luke Kenneth... | annoying. DX-Form is one exception to the rule of havin... |
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2022-07-26 |
Konstantinos... | set IN1 to NONE for fmvis |
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2022-07-26 |
Konstantinos... | fix form and pseudo-code for fmvis, tests in 64-bit... |
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2022-07-26 |
Luke Kenneth... | whitespace cleanup |
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2022-07-26 |
Konstantinos... | fix fmvis decoder, it's now a 2-operand instruction |
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2022-07-26 |
Konstantinos... | Add fmvis instruction + tests, bug #887 |
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2022-07-25 |
Dmitry Selyutin | svp64.py: fix alignment |
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2022-07-25 |
Dmitry Selyutin | svp64.py: update svindex operands |
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2022-07-23 |
Luke Kenneth... | dump output from pypowersim_fp |
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2022-07-21 |
Luke Kenneth... | whoops missing variables in new subfunction after |
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2022-07-21 |
Luke Kenneth... | add dsubstep to ISACaller |
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2022-07-21 |
Luke Kenneth... | sort out subvl unit test with expected results |
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2022-07-21 |
Luke Kenneth... | fix loopend conditions for subvectors in ISACaller |
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2022-07-20 |
Luke Kenneth... | rename substep to ssubstep, add dsubstep to SVP64State |
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2022-07-20 |
Luke Kenneth... | add first subvl unit test, subvl comes from |
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2022-07-18 |
Luke Kenneth... | move D-Immediate rewriting in ISACaller into separate... |
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2022-07-18 |
Luke Kenneth... | move inputs in ISACaller into get_input() |
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2022-07-18 |
Luke Kenneth... | move debug remap to ISACaller.remap_debug() |
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2022-07-18 |
Luke Kenneth... | whitespace and function-return code-morphing in ISACaller |
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2022-07-18 |
Luke Kenneth... | move another function in ISACaller (check_write) |
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2022-07-18 |
Luke Kenneth... | begin function split in ISACaller |
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2022-07-18 |
Luke Kenneth... | remove duplicate code create ISACaller.advance_svstate_... |
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2022-07-18 |
Luke Kenneth... | add SUBVL (substep) support to PowerDecoder2 and to... |
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2022-07-18 |
Luke Kenneth... | add substep getter/setter to SVP64State |
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2022-07-18 |
Luke Kenneth... | rename SVSTATE.svstep to SVSTATE.substep to avoid |
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2022-07-16 |
Luke Kenneth... | simplify remapyield.py, skip shows the bit to be skipped |
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2022-07-14 |
Luke Kenneth... | got fed up of long list of ifs for manually decoded... |
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2022-07-14 |
Jacob Lifshay | add jit_test for testing icbi and isync |
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2022-07-12 |
Luke Kenneth... | add DX-Form FRS for fmvis |
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2022-07-12 |
Luke Kenneth... | add recognition of 0xNNN and 0bMMMM to sv/trans/svp64.py |
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2022-07-12 |
Luke Kenneth... | add FRS as destination to PowerDecoder2 DecodeOut |
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2022-07-11 |
Luke Kenneth... | add mm=1 svindex test, setting single targetted SVSHAPE |
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2022-07-11 |
Luke Kenneth... | fix issue in SelectableInt.__rsub__ causing truncation... |
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2022-07-11 |
Luke Kenneth... | fix issue in SelectableInt using slices involving Selec... |
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2022-07-11 |
Andrey Miroshnikov | Added insn initialisation for grev() func |
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2022-07-11 |
Andrey Miroshnikov | Missed another two form sub-headings |
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2022-07-11 |
Andrey Miroshnikov | Missed another two form sub-headings |
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2022-07-11 |
Andrey Miroshnikov | Fixed missing space for form headings |
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2022-07-11 |
Luke Kenneth... | compute 2nd svindex dimension using unsignee compare |
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2022-07-10 |
Luke Kenneth... | add yx svindex test, needed to compute size of 2nd dim |
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2022-07-10 |
Luke Kenneth... | Indexed SVSHAPE add bypass mode when dim sizes are 1 |
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2022-07-10 |
Luke Kenneth... | add second svindex test, modulo 3 |
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2022-07-10 |
Luke Kenneth... | fix svindex pseudocode, set large 2nd dim on nonskip |
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2022-07-10 |
Luke Kenneth... | fix svindex unit test, experiment setting dimensions |
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2022-07-10 |
Luke Kenneth... | fix SVSHAPE iterator for index case, stop deepcopy |
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2022-07-10 |
Luke Kenneth... | add new svindex sv.add test with arbitrary index map |
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2022-07-10 |
Luke Kenneth... | non-persistence enabled on svindex as well as svremap |
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2022-07-10 |
Luke Kenneth... | fix svindex pseudocode |
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2022-07-09 |
Luke Kenneth... | pass GPR to SVSHAPEs in ISACaller |
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2022-07-09 |
Luke Kenneth... | add gpr lookup in Indexed SVSHAPE iterator (no elwidths... |
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2022-07-09 |
Luke Kenneth... | rough unit test ahowing Index REMAP basically functiona... |
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2022-07-09 |
Luke Kenneth... | add support for Indexed mode in SVSHAPE |
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2022-07-09 |
Luke Kenneth... | add storing of shape in requested SVSHAPE in svindex... |
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2022-07-06 |
Luke Kenneth... | move DX Form |
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2022-07-06 |
Luke Kenneth... | add first stub of svindex pseudocode |
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2022-07-06 |
Dmitry Selyutin | audio/mp3: convert asm to the new notation |
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2022-07-06 |
Dmitry Selyutin | svp64.py: allow macros as register names |
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2022-07-06 |
Dmitry Selyutin | svp64.py: generate registers |
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2022-07-06 |
Luke Kenneth... | add svindex to power_enums.py, minor_22.csv |
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2022-07-06 |
Luke Kenneth... | indentation on fields.txt to make it more markdown... |
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2022-07-06 |
Luke Kenneth... | convert Logical svp64_cases.py to new vector reg form |
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2022-07-06 |
Luke Kenneth... | convert ALU svp64_cases.py to new vector reg form |
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2022-07-06 |
Luke Kenneth... | converted test_caller_svstate.py to new reg format |
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2022-07-05 |
Andrey Miroshnikov | convert test_caller_svp64.py to new vector numbering... |
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2022-07-05 |
Andrey Miroshnikov | convert test_caller_svp64_predication.py to new vector... |
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2022-07-05 |
Andrey Miroshnikov | convert test_caller_svp64_ldst.py to new vector numberi... |
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2022-07-05 |
Andrey Miroshnikov | Updated the nmigen.sim import |
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2022-07-05 |
Andrey Miroshnikov | convert test_caller_svp64_fft.py to new vector numberin... |
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2022-07-05 |
Andrey Miroshnikov | convert test_caller_svp64_bc.py to new vector numbering... |
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2022-07-05 |
Andrey Miroshnikov | convert test_caller_svp64_dct.py to new vector numberin... |
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2022-07-05 |
Luke Kenneth... | converted test_caller_svp64_matrix.py to new reg format |
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2022-07-05 |
Luke Kenneth... | converted test_caller_svp64_fp.py to new reg format |
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2022-07-05 |
Luke Kenneth... | converted test_caller_svp64_mapreduce.py to new reg... |
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2022-07-05 |
Luke Kenneth... | convert test_caller_setvl.py to new vector numbering... |
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2022-07-05 |
Luke Kenneth... | add "*%" and "*" vector-numbering convention |
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2022-07-05 |
Luke Kenneth... | add note about bug #884 new reg vector naming convention |
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2022-07-05 |
Luke Kenneth... | add regression test for completely borked value from... |
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2022-07-05 |
Luke Kenneth... | take deepcopy of regs passed in to avoid accidental... |
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2022-07-02 |
Luke Kenneth... | add setvl CTR tests, fix CTR mode |
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2022-07-02 |
Luke Kenneth... | fix setvl CTR mode |
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2022-07-02 |
Luke Kenneth... | setvl has new CTR mode, making room in encoding needed |
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2022-06-30 |
Luke Kenneth... | do CSV isatables explicitly in sv_analysis.py |
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2022-06-30 |
Luke Kenneth... | explicit output of opcode_regs_deduped in mdwn table... |
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2022-06-28 |
Luke Kenneth... | add recognition of "sv." to pysvp64asm |
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2022-06-28 |
Luke Kenneth... | remove qemu co-simulation, dump output expected results |
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2022-06-26 |
Luke Kenneth... | add predicate mask test svstep |
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