2019-12-18 |
Adrian Herrera | arch-arm: Semihosting, fix SYS_FLEN |
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2019-12-18 |
Adrian Herrera | sim: kernelExtras optional load addresses |
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2019-12-18 |
Adrian Herrera | python: fix "fatal" usage in fdthelper |
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2019-12-18 |
Adrian Herrera | arch-arm: Secure EL2 checking |
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2019-12-18 |
Adrian Herrera | arch-arm: AArch64 trap check, arbitrary ECs/Imms |
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2019-12-18 |
Gabe Black | x86: Fix some bugs with KVM in SE mode on Intel machines. |
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2019-12-17 |
Gabe Black | sim: Include some required headers in the syscall debug... |
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2019-12-17 |
Gabe Black | fastmodel: Tell fast model not to shutdown when time... |
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2019-12-17 |
Gabe Black | fastmodel: Implement port proxies. |
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2019-12-17 |
Gabe Black | fastmodel: Create a TLB model which uses IRIS to do... |
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2019-12-17 |
Gabe Black | fastmodel: Add an address translation mechanism to... |
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2019-12-17 |
Jason Lowe... | misc: Add Giacomo Travaglini to PMC |
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2019-12-17 |
Nikos Nikoleris | base: Fix AddrRange::isSubset() check |
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2019-12-17 |
Bobby R. Bruce | tests: Setup Kokoro to run the GTest suite. |
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2019-12-17 |
Bobby R. Bruce | scons: Added channel_addr.cc dependency to channel_addr... |
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2019-12-17 |
Gabe Black | fastmodel: Add a header for IRIS MSN constants. |
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2019-12-17 |
Gabe Black | config: Default the indirect branch predictor to "None". |
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2019-12-16 |
Adrian Herrera | sim: kernelExtras if no kernel provided |
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2019-12-13 |
Ciro Santilli | dev-virtio,configs: expose 9p diod virtio on ARM |
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2019-12-13 |
Ciro Santilli | dev-virtio: VIO9P turns on diod verbose output with... |
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2019-12-13 |
Ciro Santilli | dev-virtio: don't set the 9p default root |
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2019-12-13 |
Ciro Santilli | dev-virtio: use diod basename as the default 9p path |
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2019-12-12 |
Daniel R. Carvalho | mem: Encapsulate mapping gem5 to host address space |
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2019-12-12 |
Daniel R. Carvalho | mem-cache: Move unused prefetches counter update |
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2019-12-12 |
Gabe Black | python: Convert terminal escape sequences to strings. |
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2019-12-11 |
Giacomo Travaglini | arch-arm: Always initialize SVE memData |
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2019-12-11 |
Giacomo Travaglini | arch-arm: Avoid creating an empty byteEnable vector |
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2019-12-11 |
Giacomo Travaglini | cpu: Replace empty byteEnable check with Request::isMasked |
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2019-12-11 |
Giacomo Travaglini | cpu: Fix coding style (byteEnable->byte_enable) |
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2019-12-11 |
Giacomo Travaglini | cpu: Add byteEnable assertions to readMem and initateMe... |
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2019-12-10 |
Gabe Black | sim,arch: Collapse the ISA specific versions of m5Syscall. |
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2019-12-10 |
Gabe Black | arch,cpu,sim: Push syscall number determination up... |
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2019-12-10 |
Gabe Black | x86: Stop manually clearing RFLAGS.RF after a system... |
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2019-12-10 |
Gabe Black | arch: Get rid of the now unused setSyscallArg. |
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2019-12-10 |
Gabe Black | arch: Stop using setSyscallArg to set argc and argv. |
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2019-12-10 |
Gabe Black | sim: Add a wrapper/subclass for SyscallDesc which uses... |
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2019-12-10 |
Gabe Black | sim: Add a mechanism to translate ABIs to call host... |
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2019-12-10 |
Gabe Black | sim: Get rid of the now unused SyscallDesc flags and... |
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2019-12-10 |
Gabe Black | arch: Use ignoreWarnOnceFunc instead of the WarnOnce... |
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2019-12-10 |
Gabe Black | sim: Reintroduce the ignoreWarnOnceFunc syscall handler. |
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2019-12-10 |
Gabe Black | sim: Make the syscalls use the SyscallReturn suppressio... |
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2019-12-10 |
Adrian Herrera | dev-arm: GenericTimer, configurable base and low freqs |
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2019-12-10 |
Adrian Herrera | dev-arm: GenericTimer, freq as 32-bit value |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Disambuiguate NumFloatV7ArchRegs usage |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Unify VLdmStm behaviour when reg out of index |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Fix NumVecV7ArchRegs value (64->16) |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Reorder arch/arm/registers.hh constants |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Replace NumFloatV8ArchRegs with NumVecV8ArchRegs |
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2019-12-09 |
Giacomo Travaglini | tests: AArch64 Linux as quick regressions (instead... |
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2019-12-09 |
Giacomo Travaglini | mem: Add Request::isMasked to check for byte strobing |
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2019-12-09 |
Giacomo Travaglini | mem: Add byteEnable copy to Request copy constructor |
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2019-12-09 |
Rahul Thakur | tests: Increase jenkins test timeout to 4 hours. |
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2019-12-08 |
Alec Roelke | arch-riscv: set MaxMiscDestRegs to 2 |
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2019-12-07 |
Gabe Black | scons: Set the partial linking group for EXTRAS dirs. |
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2019-12-07 |
Gabe Black | scons: Fixes to improve python 3 support. |
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2019-12-06 |
Daniel R. Carvalho | util: Add a git commit-msg hook |
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2019-12-06 |
Gabe Black | kvm,arm: Update the KVM ARM v8 CPU to use vector regs. |
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2019-12-06 |
Xin Ouyang | arch-riscv: fix asmtest concurrent issues. |
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2019-12-05 |
Andrea Mondelli | arch-x86: missing override specifier |
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2019-12-05 |
marjanfariborz | arch-x86: Adding LDDQU instruction |
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2019-12-04 |
Gabe Black | sim: Add a suppression mechanism to the SyscallReturn... |
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2019-12-04 |
Gabe Black | sim: Small style fixes in sim/syscall_return.hh. |
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2019-12-04 |
Gabe Black | sim: Change the syscall executor to a std::function. |
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2019-12-04 |
Gabe Black | sparc: Fix the getresuidFunc prototype. |
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2019-12-04 |
Gabe Black | sparc: Fix the predecoder's moreBytes method. |
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2019-12-03 |
Gabe Black | systemc: Purposefully *expose* bind in the initiator... |
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2019-12-03 |
Gabe Black | fastmodel: Switch the diagnostic pragmas to GCC from... |
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2019-12-03 |
Bobby R. Bruce | misc: CONTRIBUTING.md to advise linking Jira Issues... |
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2019-12-03 |
Brandon Potter | cpu,sim-se: move error checks in syscall methods |
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2019-12-03 |
Gabe Black | systemc,fastmodel: Use the gem5_scons error and warning... |
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2019-12-03 |
Gabe Black | systemc: Suppress a spurious clang warning in the syste... |
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2019-12-03 |
Gabe Black | systemc: Fix up some lingering Accellera specific code... |
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2019-12-03 |
Ciro Santilli | base: add the FmtStackTrace debug option |
commit | commitdiff | tree |
2019-12-03 |
Giacomo Travaglini | sim-se: Avoid function overloading for syscall implemen... |
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2019-12-03 |
Gabe Black | systemc: Add a bunch of missing overrides to the system... |
commit | commitdiff | tree |
2019-12-03 |
Gabe Black | fastmodel: Suppress a spurious warning on clang for... |
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2019-12-01 |
Ian Jiang | arch-riscv: Fix disassembling of immediate for c.lui... |
commit | commitdiff | tree |
2019-11-28 |
Ciro Santilli | dev-arm: Automatically assign PCI device ids in attachP... |
commit | commitdiff | tree |
2019-11-28 |
Adrian Herrera | dev-arm: device name in AmbaFake accesses |
commit | commitdiff | tree |
2019-11-28 |
Gabe Black | mem-cache: Avoid hiding a virtual method in the diction... |
commit | commitdiff | tree |
2019-11-28 |
Gabe Black | mem-cache: Remove a std::move clang says is unnecessary. |
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2019-11-28 |
Gabe Black | arm: Make sure not to shift off of the end of a uint32_... |
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2019-11-27 |
Giacomo Travaglini | base, python: Allow dirname selection for the interpreter |
commit | commitdiff | tree |
2019-11-27 |
Giacomo Travaglini | configs: Add --redirects for syscall emulation |
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2019-11-27 |
Giacomo Travaglini | base: Fix DPRINTF_UNCONDITIONAL on gem5.fast |
commit | commitdiff | tree |
2019-11-27 |
Giacomo Travaglini | configs: Add root redirect path in SE mode only when set |
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2019-11-27 |
Giacomo Travaglini | sim-se: Check Path redirection when mmapping |
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2019-11-27 |
Giacomo Travaglini | configs: Fix baremetal platform |
commit | commitdiff | tree |
2019-11-26 |
Ciro Santilli | sim: prefix --debug-flags Event logs with the flag... |
commit | commitdiff | tree |
2019-11-26 |
Ciro Santilli | cpu: prefix ExecEnable to the native trace to match... |
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2019-11-26 |
Ciro Santilli | base: generalize ExecTicks to all messages with FmtTicksOff |
commit | commitdiff | tree |
2019-11-26 |
Ciro Santilli | base: create DPRINTF_UNCONDITIONAL |
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2019-11-26 |
Ciro Santilli | base: add the --debug-flag to DPRINTF output with FmtFlag |
commit | commitdiff | tree |
2019-11-26 |
Giacomo Travaglini | arch-arm: Make the Tarmac parsed registers case insensitive |
commit | commitdiff | tree |
2019-11-26 |
Ian Jiang | arch-riscv: Fix immediate decoding for integer shift... |
commit | commitdiff | tree |
2019-11-26 |
Ian Jiang | arch-riscv: Fix disassembling for fence and fence.i |
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2019-11-26 |
Gabe Black | arch,cpu: Get rid of ISA_HAS_CC_REGS and its associated... |
commit | commitdiff | tree |
2019-11-25 |
Gabe Black | arm: Stop serializing ISA values wihch are cached from... |
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2019-11-25 |
Adrian Herrera | arch-arm: default MIDR for Armv8 ISA processors |
commit | commitdiff | tree |
2019-11-25 |
Giacomo Travaglini | dev-arm: Adjust off_chip ranges in VExpress_GEM5 platform |
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