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riscv-isa-sim.git
2017-09-21
Tim Newsome
Actually let hartreset be set.
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2017-09-21
Tim Newsome
Fix debug reset.
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2017-09-21
Tim Newsome
Fix corner case in repeated execution (#127)
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2017-09-21
Tim Newsome
Fix comment typo. (#126)
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2017-09-12
Tim Newsome
Merge pull request #123 from riscv/debug_interrupts
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2017-09-12
Tim Newsome
Don't take interrupts while in Debug Mode.
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2017-08-28
Tim Newsome
Merge pull request #121 from riscv/debug_store
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2017-08-28
Tim Newsome
Add a nice debug printf for debug_module_t::store
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2017-08-11
Tim Newsome
Merge pull request #119 from riscv/quiet
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2017-08-11
Tim Newsome
Turn off debug module debug printfs.
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2017-08-10
Palmer Dabbelt
Correct c.li and c.lui disassembly (#118)
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2017-08-10
Tim Newsome
Merge pull request #117 from riscv/multicore_debug
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2017-08-07
Tim Newsome
Fix multicore debug.
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2017-06-30
Andrew Waterman
Remove reference to H-mode in ECALL
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2017-06-14
Palmer Dabbelt
Merge pull request #113 from riscv/debug_readme
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2017-06-14
Tim Newsome
Support 64-bit start PCs in reset vector.
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2017-06-09
Tim Newsome
Update README to use --rbb-port
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2017-06-09
Tim Newsome
Merge pull request #112 from riscv/autoexecwrite
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2017-06-09
Tim Newsome
Return success on writes to abstractauto
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2017-06-08
Tim Newsome
Merge pull request #110 from riscv/debug_rom_build
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2017-06-08
Tim Newsome
Merge pull request #111 from riscv/dtm_reset_error
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2017-06-08
Tim Newsome
Reset to "success" instead of "error."
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2017-06-08
Tim Newsome
`make clean && make` works again in debug_rom
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2017-06-07
Andrew Waterman
Forbid S-mode execution from user memory
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2017-06-05
Palmer Dabbelt
Merge pull request #108 from riscv/dtc-error
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2017-06-05
Andrew Waterman
Configure should fail if device-tree-compiler is not...
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2017-05-25
Andrew Waterman
minNum -> minimumNumber
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2017-05-23
Palmer Dabbelt
Merge pull request #104 from riscv/disable-werror
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2017-05-23
Palmer Dabbelt
Disable -Werror when building
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2017-05-17
Palmer Dabbelt
Merge remote-tracking branch 'origin/priv-1.10'
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2017-05-16
Palmer Dabbelt
Merge remote-tracking branch 'origin/debug-0.13' into...
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2017-05-16
Palmer Dabbelt
Better error message when doing DMI operations and...
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2017-05-15
Megan Wachs
debug: whitespace errors
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2017-05-15
Megan Wachs
Merge branch 'debug-0.13' into HEAD
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2017-05-14
Andrew Waterman
Make C.LI/C.LUI trapping behavior match spec
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2017-05-05
Andrew Waterman
UXL=SXL=MXL
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2017-05-05
Andrew Waterman
Trap superpage PTEs when PPN LSBs are set
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2017-05-03
Kito Cheng
Add missing include for devices.h
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2017-05-01
Andrew Waterman
Fix segfault when accessing bad memory addresses
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2017-05-01
Andrew Waterman
Set default entry point from ELF
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2017-05-01
Andrew Waterman
Add option to set start pc
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2017-05-01
Andrew Waterman
Support more flexible main memory allocation
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2017-05-01
Andrew Waterman
Store both host & target address in soft TLB
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2017-04-26
Palmer Dabbelt
Merge pull request #96 from riscv/ndmreset
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2017-04-26
Palmer Dabbelt
Remove a debugging printf
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2017-04-26
Palmer Dabbelt
Don't spin on the remote bitbang reads
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2017-04-26
Palmer Dabbelt
Handle abstractcs.busy
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2017-04-26
Palmer Dabbelt
Have ndmreset reset the processor
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2017-04-25
Andrew Waterman
FMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.X
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2017-04-25
Andrew Waterman
Remove hret instruction
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2017-04-24
Palmer Dabbelt
Merge pull request #94 from riscv/commitlog
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2017-04-19
Palmer Dabbelt
Fix builds with "--enable-commitlog"
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2017-04-18
Megan Wachs
debug: move remote_bitbang into riscv
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2017-04-18
Megan Wachs
debug: Remove duplicate remote_bitbang file
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2017-04-18
Megan Wachs
debug: Able to successfully examine a single hart.
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2017-04-18
Megan Wachs
debug: Use Debug-Module specific constants instead...
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2017-04-18
Megan Wachs
debug: Add fence and fence.i to ensure Debug RAM is...
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2017-04-18
Megan Wachs
debug: Checkpoint which somewhat works with OpenOCD...
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2017-04-18
Megan Wachs
debug: move the debug_rom defines to a seperate file
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2017-04-18
Megan Wachs
debug: Use more unique debug ROM names
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2017-04-18
Megan Wachs
debug: Use a more practical debug ROM
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2017-04-18
Megan Wachs
debug: Move things around, but addresses now conflict...
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2017-04-17
Megan Wachs
debug: consider COMMAND.transfer bit, and implment...
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2017-04-17
Megan Wachs
debug: Compiles again with new debug_defines.h file...
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2017-04-17
Megan Wachs
debug: bump the debug_defines to match spec
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2017-04-17
Megan Wachs
Merge remote-tracking branch 'origin/priv-1.10' into...
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2017-04-11
Andrew Waterman
Implement new FP encoding
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2017-04-08
Andrew Waterman
Implement vectored interrupt proposal
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2017-04-06
Andrew Waterman
Add --enable-misaligned option for misaligned ld/st...
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2017-04-01
Yunsup Lee
update encoding.h to get PMP updates
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2017-04-01
Andrew Waterman
Update LICENSE copyright date
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2017-03-30
Wesley W. Terpstra
fdt: move interrupt controller into its own node
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2017-03-28
Andrew Waterman
Set badaddr=0 on illegal instruction traps
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2017-03-28
Andrew Waterman
On EBREAK, set badaddr to pc
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2017-03-27
Andrew Waterman
Separate page faults from physical memory access exceptions
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2017-03-25
Andrew Waterman
Default to 2 GiB of memory
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2017-03-23
Andrew Waterman
Require little-endian host
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2017-03-22
Wesley W. Terpstra
riscv: replace rtc device with a real clint implementation
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2017-03-22
Wesley W. Terpstra
sim: declare cores as interrupt-controllers for clint
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2017-03-21
Wesley W. Terpstra
bootrom: set a0 to hartid and a1 to dtb before boot
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2017-03-21
Wesley W. Terpstra
configstring: rename variables to dts
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2017-03-21
Wesley W. Terpstra
riscv: remove dependency on num_cores
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2017-03-21
Wesley W. Terpstra
bootrom: include compiled dtb
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2017-03-21
Wesley W. Terpstra
sim: create DTS instead of config string
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2017-03-21
Wesley W. Terpstra
sim: define emulated CPU clock rate to be 1GHz
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2017-03-21
Wesley W. Terpstra
autoconf: put location of 'dtc' into config.h
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2017-03-21
Palmer Dabbelt
spec bump
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2017-03-20
Andrew Waterman
PUM -> SUM; expose MXR to S-mode
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2017-03-16
Andrew Waterman
Simplify interrupt-stack discipline
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2017-03-13
Andrew Waterman
Implement mstatus.TW, mstatus.TVM, and mstatus.TSR
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2017-03-07
Andrew Waterman
Don't overload illegal instruction trap in interactive...
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2017-02-27
Andrew Waterman
Sv57 and Sv64 are not spec'd yet
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2017-02-25
Andrew Waterman
New counter enable scheme
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2017-02-25
Tim Newsome
Update bits to latest spec.
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2017-02-23
Tim Newsome
Implement halt request.
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2017-02-22
Tim Newsome
Improve debug performance.
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2017-02-22
Tim Newsome
Don't waste time spinning in place in debug mode
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2017-02-21
Andrew Waterman
serialize simulator on wfi
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2017-02-21
Andrew Waterman
Take M-mode interrupts over S-mode interrupts
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2017-02-21
Andrew Waterman
permit MMIO loads to MSIP bit
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