gem5.git
2018-06-22 Nikos Nikolerismem-cache: Promote targets that don't require writable
2018-06-22 Nikos Nikolerismem-cache: Fix promoting of targets that need writable
2018-06-22 Nikos Nikolerismem-cache: Selectively clear downstream pending
2018-06-22 Matteo M. FusiSConstruct: additional message for the error checking...
2018-06-22 Giacomo Travagliniarch-arm: AArch32 execution triggering AArch64 SW Break
2018-06-22 Giacomo Travagliniarch-arm: BadMode checking if corresponding EL is imple...
2018-06-21 Gabe Blackbase: Add a class which encapsulates Fibers.
2018-06-21 Andreas Sandbergsim: Use the canonical way of iterating over a dictionary
2018-06-21 Andreas Sandbergdev-arm: Use recurseDeviceTree instead of custom in...
2018-06-21 Giacomo Travaglinicpu: Fix bug introduced by RequestPtr type change
2018-06-20 Nikos Nikolerisbase: Fix includes in AddrRangeMap header file
2018-06-20 Jason Lowe... mem-cache: Fix TempCacheBlock insert
2018-06-19 Nikos Nikolerismem: Use address range to find the right physical address
2018-06-19 Nikos Nikolerismem: Use address range to find the destination port...
2018-06-19 Gabe Blackmem: Use the caching in the AddrRangeMap class in Physi...
2018-06-19 Gabe Blackmem: Use the caching built into AddrRangeMap in the...
2018-06-19 Gabe Blackbase: Build caching into the AddrRangeMap class
2018-06-19 Nikos Nikolerisbase, mem: Disambiguate if an addr range is contained...
2018-06-19 Nikos Nikolerismem-cache: Fix support for secure blocks in the FALRU...
2018-06-15 Daniel R. Carvalhomem-cache: Initialize CacheBlk data pointer
2018-06-15 Daniel R. Carvalhomem-cache: Forward declare ReplaceableEntry
2018-06-15 Nikos Nikolerisdev-arm: Fix the address range for some I/O devices
2018-06-15 Tuan Tatests,style: add RISC-V assembly tests
2018-06-15 Gabe Blacksim: Add a SimObject python field which overrides the...
2018-06-14 Tuan Tacpu: Prevent suspended TimingSimple CPUs from fetching...
2018-06-14 Tuan Tacpu: add a new instruction type 'Atomic'
2018-06-14 Tuan Taarch: support issuing Atomic Mem Operation (AMO) requests
2018-06-14 Tuan Tabase,mem: Support AtomicOpFunctor in the classic memory...
2018-06-14 Jason Lowe... ruby: Revamp standalone SLICC script
2018-06-14 Giacomo Travagliniarch-arm: Adapting IllegalExecution fault for AArch32
2018-06-14 Giacomo Travagliniarch-arm: Add Illegal Execution flag to PCState
2018-06-14 Giacomo Travagliniarch-arm: Read APSR in User Mode
2018-06-14 Andreas Sandbergsystem-arm: Split the VExpress_GEM5_V1 base dts
2018-06-14 Rohit Kurupdev-arm: Add new VExpress_GEM5_V1_Base Platform
2018-06-14 Andreas Sandbergcpu-minor: Remove redundant thread startup call
2018-06-14 Andreas Sandbergdev-arm: Remove deprecated GIC test interfaces
2018-06-13 Gabe Blacktests: Make "UnitTest"s more like GTest so they can...
2018-06-13 Nikos Nikolerismem-cache: Remove unnecessary cast in SectorTags::findV...
2018-06-13 Giacomo Travagliniarch-arm: Fix missing Request allocation
2018-06-13 Daniel R. Carvalhomem-cache: Insert on block allocation
2018-06-13 Daniel R. Carvalhomem-cache: Make packet const in insertBlock
2018-06-13 Daniel R. Carvalhomem-cache: Create Sector Cache
2018-06-12 Tuan Tatests: add some pthread and std::thread unit tests
2018-06-12 Daniel R. Carvalhoruby: Fix initial weight in weighted LRU
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests
2018-06-11 Giacomo Travaglinimisc: Substitute pointer to Request with aliased RequestPtr
2018-06-08 Daniel R. Carvalhomem-cache: Change Cache block tag check
2018-06-08 Daniel R. Carvalhomem-cache: Use secure bit in findVictim
2018-06-08 Daniel R. Carvalhomem-cache: Move tagsInUse to children
2018-06-08 Daniel R. Carvalhomem-cache: Return evictions along with victims
2018-06-08 Daniel R. Carvalhomem-cache: Use ReplaceableEntry in findBlockBySetAndWay
2018-06-08 Gabe Blacksim: Rename the SimObject cxx_bases field to cxx_extra_...
2018-06-07 Andreas Sandbergdev-arm: Add a VirtIO MMIO device to VExpress_GEM5_V1
2018-06-07 Andreas Sandbergdev-arm: Add a MMIO transport interface for VirtIO
2018-06-07 Andreas Sandbergdev-arm: Add a GIC interrupt adaptor
2018-06-06 Andreas Sandbergarch-arm: Remove dead doingStage2 variable in PT walker
2018-06-06 Andreas Sandbergsystem-arm: Update gem5 timer interrupt specification
2018-06-06 Andreas Sandbergarch-arm: Perform stage 2 lookups using the EL2 state
2018-06-06 Andreas Sandbergarch-arm: Respect EL from translation type
2018-06-06 Andreas Sandbergarch-arm: Fix page size handling when merging stage...
2018-06-06 Andreas Sandbergdev, arm: Add support for HYP & secure timers
2018-06-06 Andreas Sandbergarch-arm: Adjust breakpoint EC depending on source...
2018-06-01 Daniel R. Carvalhomem-cache: Privatize extractSet
2018-06-01 Daniel R. Carvalhomem-cache: Create an address aware TempCacheBlk
2018-06-01 Daniel R. Carvalhomem-cache: Fix secure bit modification
2018-05-31 Nikos Nikolerismem-cache: Replace block visitor with std::function
2018-05-31 Nikos Nikolerismem-cache: Fix include directives in the cache related...
2018-05-31 Nikos Nikolerismem-cache: Add a non-coherent cache
2018-05-31 Nikos Nikolerismem-cache: Move cache bypass mechanism to the ports
2018-05-31 Nikos Nikolerismem-cache: Adopt a more sensible cache class hierarchy
2018-05-31 Nikos Nikolerismem-cache: Add helper function to perform evictions
2018-05-31 Nikos Nikolerismem-cache: Delegate block invalidation to block allocation
2018-05-31 Nikos Nikolerismem-cache: Refactor the recvAtomic function
2018-05-31 Nikos Nikolerismem-cache: Refactor the cache recvTimingReq function
2018-05-31 Nikos Nikolerismem-cache: Refactor the cache recvTimingResp function
2018-05-31 Daniel R. Carvalhomem-cache: Fix RandomReplData
2018-05-30 Brandon Pottergpu-compute: use X86ISA::TlbEntry over GpuTlbEntry
2018-05-30 Michael LeBeanedev: Exit correctly in dist-gem5 for SE mode
2018-05-30 Nikos Nikolerismem-cache: Determine if an MSHR has requests from anoth...
2018-05-29 Giacomo Travagliniarch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL...
2018-05-29 Giacomo Travagliniarch-arm: Remove unusued MISCREG_A64_UNIMPL
2018-05-29 Giacomo Travagliniarch-arm: MPIDR.MT = 1 in a multithreaded system
2018-05-29 Giacomo Travagliniarch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation...
2018-05-29 Giacomo Travaglinicpu: Avoid unnecessary dynamic_pointer_cast in atomic...
2018-05-29 Giacomo Travagliniarch-arm: Implement ARMv8.1 TTBR1_EL2 register
2018-05-29 Giacomo Travagliniarch-arm: Add E2H bit to HCR_EL2 System register
2018-05-24 Gabe Blackx86: Add op classes to the MediaOps.
2018-05-18 Wendy Elsassermem: Add support for more flexible DRAM timing and...
2018-05-18 Wendy Elsassermem: Optimize self-refresh entry
2018-05-17 Nikos Nikolerismem-cache: Move reference count stats update to blk...
2018-05-17 Nikos Nikolerismem-cache: Remove isTouched field from the CacheBlk
2018-05-17 Nikos Nikolerismem-cache: Move replacements stat to the base cache...
2018-05-17 Nikos Nikolerisbase: Add M5 flag for [[nodiscard]] attribute
2018-05-17 Nikos Nikolerismem-cache: Simplify writeback for the tempBlock in...
2018-05-16 Andreas Sandbergarch-arm: Fix semihosting arg count for SYS_GET_CMDLINE
2018-05-16 Andreas Sandbergarch-arm: Add support for semihosting STDIO redirection
2018-05-16 Tony Gutierrezstyle: fix amd license and style issues
2018-05-15 Tony Gutierrezgpu-compute: Cleanup the scheduler a bit
2018-05-12 Alec Roelkearch-riscv: Update CSR implementations
2018-05-09 Giacomo Travaglinisim: Remove trailing dot when assigning a master's...
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