2020-05-12 |
Bobby R. Bruce | misc: Added missing optional dependencies to 18.04... |
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2020-05-12 |
Bobby R. Bruce | misc: Added python-six as a dependency in 18.04 docker |
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2020-05-12 |
Bobby R. Bruce | misc: Removed python3 Dockerfile |
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2020-05-12 |
Bobby R. Bruce | misc: Added Dockerfile for Ubuntu 20.04 |
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2020-05-12 |
Jason Lowe... | scons: Update python-config flags for python3.8 |
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2020-05-12 |
Giacomo Travaglini | scons: Add readCommandWithReturn helper |
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2020-05-11 |
Ayaz Akram | arch-riscv,tests: small update to make gem5.fast compile |
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2020-05-11 |
Matthew Poremba | mem: Defer deletion of respQueue.front() in DRAMCtrl |
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2020-05-11 |
Bobby R. Bruce | misc: Updated resources bucket url to version 20 |
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2020-05-11 |
Bobby R. Bruce | misc: Updated version to 20.0.0.0 |
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2020-05-11 |
Timothy Hayes | mem-ruby: MESI_Two_Level missing function compilation fix |
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2020-05-11 |
Timothy Hayes | mem-ruby: MOESI_CMP_directory sync fix |
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2020-05-08 |
Nils Asmussen | base,sim: allow m5writeFile with stdout/stderr. |
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2020-05-08 |
Jason Lowe... | configs: Remove old boot files |
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2020-05-06 |
Ayaz Akram | mem-ruby: Deep renaming of Prefetcher to RubyPrefetcher |
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2020-05-06 |
Giacomo Travaglini | python: Manually convert float to int when using %x |
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2020-05-06 |
Giacomo Travaglini | util: Make cpt_upgraders python3 compatible |
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2020-05-06 |
Giacomo Travaglini | util: Port git hooks to python3 |
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2020-05-02 |
Timothy Hayes | mem-ruby: MESI_Three_level prefetcher page crossing |
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2020-05-02 |
Timothy Hayes | mem-ruby: MESI_Three_level prefetcher support |
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2020-05-02 |
Timothy Hayes | mem-ruby: MESI_Three_Level LL/SC improvements |
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2020-05-02 |
Timothy Hayes | mem-ruby: LL/SC fixes |
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2020-05-02 |
Gabe Black | util: Add support for multiple call types in the m5... |
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2020-05-02 |
Nils Asmussen | misc: added news on RISC-V to RELEASE-NOTES.md. |
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2020-05-02 |
Nils Asmussen | arch-riscv: be prepared for CSR changes during PT walk. |
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2020-05-02 |
Timothy Hayes | mem-ruby: fix MESI_Three_Level erroneous transition |
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2020-05-02 |
Jason Lowe... | tests: Update tests to save output on failure |
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2020-05-02 |
Jason Lowe... | ext: Fix tmpfiles in testlib |
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2020-05-01 |
Nikos Nikoleris | scons: Build the marshal binary in a bare minimum envir... |
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2020-05-01 |
Ayaz Akram | tests: update linux boot tests |
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2020-05-01 |
Daniel R. Carvalho | mem-cache: Use AssociativeSet in Stride prefetcher |
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2020-05-01 |
Daniel R. Carvalho | mem-cache: Use SatCounter in Stride prefetcher |
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2020-05-01 |
Daniel R. Carvalho | mem-cache: Cleanup of SBOOE prefetcher |
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2020-05-01 |
Daniel R. Carvalho | mem-cache: Use CircularQueue in PIF prefetcher |
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2020-05-01 |
Daniel R. Carvalho | mem-cache: Use CircularQueue for the STeMS's RMOB |
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2020-05-01 |
Daniel R. Carvalho | mem-cache: Fix DCPT with CircularQueue |
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2020-05-01 |
Hsuan Hsu | cpu: Don't assert on branch target addresses |
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2020-05-01 |
Bobby R. Bruce | misc: Added RELEASE-NOTES.md |
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2020-04-30 |
Gabe Black | python: Fix compareVersions for python 3. |
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2020-04-30 |
Daniel R. Carvalho | mem-cache: Fix priority of multi compressor |
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2020-04-30 |
Matthew Poremba | mem: Token port implementation |
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2020-04-30 |
Tony Gutierrez | misc: Add build opts for GCN3 GPU ISA |
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2020-04-30 |
Joe Gross | configs: add option to set the timeouts for the TCPs... |
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2020-04-30 |
Tony Gutierrez | dev-hsa: Add HSA device and HSA packet processor |
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2020-04-30 |
Tony Gutierrez | arch-gcn3: Add files for arch gcn3 (GPU machine ISA) |
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2020-04-30 |
Nikos Nikoleris | sim: Inheritance fixes in varargs |
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2020-04-30 |
Nikos Nikoleris | mem-ruby: Avoid const from member due to &Message:... |
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2020-04-30 |
Nikos Nikoleris | arch-arm: Fix access modifier in Arm*ProcessBits class |
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2020-04-30 |
Nikos Nikoleris | scons: Disable unsupported -Wl,--as-needed in MacOS |
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2020-04-30 |
Nikos Nikoleris | arch-arm: Fix inconsistency in variable name |
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2020-04-30 |
Nikos Nikoleris | mem-ruby: Removed the unused parameter m_id from Virtua... |
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2020-04-30 |
Nikos Nikoleris | arch-arm: Fix function signature inconsistencies in... |
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2020-04-30 |
Nikos Nikoleris | sim: Fix mismatch between #ifndef and #define in varargs.hh |
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2020-04-30 |
Nikos Nikoleris | arch-arm, mem-ruby, sim: Add missing overrides |
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2020-04-30 |
Nikos Nikoleris | arch-arm: Downgrade constexpr causing build errors... |
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2020-04-30 |
Gabe Black | sim: Add an option to suppress the return value in... |
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2020-04-29 |
Gabe Black | misc: Use the protobuf version to choose between ByteSi... |
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2020-04-29 |
Anouk Van Laer | sim-power: Addition of PowerDomains |
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2020-04-29 |
Anouk Van Laer | sim-power: Specify the states a PowerState object can... |
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2020-04-29 |
Anouk Van Laer | sim-power: Creation of PowerState class |
commit | commitdiff | tree |
2020-04-29 |
Nikos Nikoleris | configs: Change fs_power.py to use absolute paths for... |
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2020-04-29 |
Nikos Nikoleris | sim-power: Fix the way the power model accesses stats |
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2020-04-29 |
Nikos Nikoleris | base, python, sim: Add support for resoving a stat... |
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2020-04-29 |
Nikos Nikoleris | base: Add support for resolving stats within groups... |
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2020-04-29 |
Nikos Nikoleris | sim: Add function that returns all variables in a MathExpr |
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2020-04-29 |
Ciro Santilli | tests: create tests for various traffic generators... |
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2020-04-29 |
Ciro Santilli | tests: fix the memcheck test |
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2020-04-29 |
Ciro Santilli | mem: make MemTest panic on a packet error |
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2020-04-29 |
Ciro Santilli | configs: remove exec of Options.py from ruby_mem_test.py |
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2020-04-29 |
Nils Asmussen | arch-riscv: report that we don't have debugging support. |
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2020-04-29 |
Nils Asmussen | arch-riscv: respect IALIGN, influenced by toggling... |
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2020-04-29 |
Nils Asmussen | arch-riscv: let FPU instructions fault if status.FS... |
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2020-04-29 |
Nils Asmussen | arch-riscv: make uret,sret,mret SerializeAfter,NonSpecu... |
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2020-04-29 |
Nils Asmussen | arch-riscv: make accesses to CSRs SerializeAfter. |
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2020-04-29 |
Nils Asmussen | arch-riscv: fault according to status.{TVM,TSK,TW}. |
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2020-04-29 |
Nils Asmussen | arch-riscv: added dummy implementation of wfi instruction. |
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2020-04-29 |
Nils Asmussen | arch-riscv: fault on mstatus accesses from lower privil... |
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2020-04-29 |
Nils Asmussen | arch-riscv: ignore writes to SXL/UXL fields in status... |
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2020-04-29 |
Nils Asmussen | arch-riscv: added (un)serialization of miscRegFile. |
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2020-04-29 |
Nils Asmussen | arch-riscv: show names of MiscRegs on accesses. |
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2020-04-29 |
Nils Asmussen | arch-riscv: fixed read of {M,S,U}TVEC. |
commit | commitdiff | tree |
2020-04-29 |
Nils Asmussen | configs: added bare metal FS support for RISC-V. |
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2020-04-29 |
Nils Asmussen | cpu,configs: let RISC-V use the PT walker cache. |
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2020-04-29 |
Nils Asmussen | arch-riscv: fixed formatting. |
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2020-04-29 |
Nils Asmussen | arch-riscv: implement RemoteGDB::acc for FS mode. |
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2020-04-29 |
Nils Asmussen | arch-riscv: implement sfence.vma to flush TLBs. |
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2020-04-29 |
Nils Asmussen | arch-riscv: make sure only supported modes can be set... |
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2020-04-29 |
Nils Asmussen | arch-riscv: added TLB and page table walker. |
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2020-04-29 |
Gabe Black | arm: Add a unit test for some aspects of the aapcs64... |
commit | commitdiff | tree |
2020-04-28 |
Gabe Black | arm: Fix some bugs in the aapcs64 implementation. |
commit | commitdiff | tree |
2020-04-28 |
Matthew Poremba | configs: Add missing requestToMemory MessageBuffers |
commit | commitdiff | tree |
2020-04-28 |
Jordi Vaquero | arch-arm: Fix clasta/b and lasta/b simd&fp instructions |
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2020-04-28 |
Giacomo Travaglini | configs: Do not require args.kernel to be set in bareme... |
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2020-04-28 |
Giacomo Travaglini | sim, arch-arm: Restore capability of running without... |
commit | commitdiff | tree |
2020-04-28 |
Gabe Black | util: Add an abstraction layer for call types in the... |
commit | commitdiff | tree |
2020-04-28 |
Gabe Black | util: Add a helpful macro for merging two tokens to... |
commit | commitdiff | tree |
2020-04-28 |
Gabe Black | util: Use a dispatch table to call ops in the m5 utility. |
commit | commitdiff | tree |
2020-04-28 |
Gabe Black | misc,util: Remove explicit ';'s from M5OP_FOREACH. |
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2020-04-28 |
Gabe Black | misc: Add the SE mode m5 ops to m5ops.h. |
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2020-04-28 |
Gabe Black | sim,misc: Rename M5OP_ANNOTATE to M5OP_RESERVED1. |
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