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riscv-isa-sim.git
2016-03-02
Andrew Waterman
implement PUM functionality
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2016-03-02
Andrew Waterman
sptbr now a holds a PPN, not an address
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2016-03-02
Andrew Waterman
Return to interactive mode after a trap
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2016-03-02
Andrew Waterman
Use simpler MTVEC scheme
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2016-03-02
Andrew Waterman
Fix ERET bug
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2016-03-02
Andrew Waterman
Zero-extend all CSR writes
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2016-03-02
Andrew Waterman
Fix ERET serialization strategy
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2016-03-02
Andrew Waterman
Add autoconf check for little-endianness
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2016-03-02
Andrew Waterman
Set default RV32 RAM size to 4 GiB - 256 MiB
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2016-03-02
Andrew Waterman
Serialize simulator on ERET
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2016-03-02
Andrew Waterman
WIP on priv spec v1.9
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2016-03-02
Andrew Waterman
Compile debug symbols
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2016-03-02
Andrew Waterman
Mark SoftFloat routines static inline
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2016-03-02
Andrew Waterman
Upgrade to latest SoftFloat
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2016-02-04
Andrew Waterman
Actually refill ITLB on ITLB miss
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2016-01-30
Andrew Waterman
Fix NaN propagation for fcvt
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2016-01-24
Andrew Waterman
Remove hwacha support
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2016-01-13
Andrew Waterman
Use new NaN discipline
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2016-01-13
Andrew Waterman
don't ignore data value when writing MIPI
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2016-01-05
Andrew Waterman
fix help message
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2015-12-17
Scott Beamer
another osx clang compatability fix
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2015-11-20
Andrew Waterman
C.ADDIW is reserved for rd=0
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2015-11-13
Andrew Waterman
Generate device tree for target machine
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2015-11-13
Andrew Waterman
Access FP regs through a macro
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2015-11-05
Andrew Waterman
Merge pull request #34 from zizztux/incorrect_int_reg_count
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2015-10-28
SeungRyeol Lee
Fix incorrect upper limit for loop on interactive int...
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2015-10-26
Andrew Waterman
Fix histogram for RVC
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2015-10-20
Andrew Waterman
Update to hopefully final RVC 1.9 encoding
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2015-10-13
Andrew Waterman
Fix --dc flag
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2015-10-06
Andrew Waterman
RVC encoding tweak
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2015-10-06
Andrew Waterman
more work towards RVC 1.8
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2015-10-02
Andrew Waterman
work towards rvc 1.8
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2015-10-02
Andrew Waterman
clean up shift instruction implementation
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2015-09-25
Andrew Waterman
Refactor memory access code; add MMIO support
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2015-09-25
Andrew Waterman
Use enum instead of two bools to denote memory access...
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2015-09-16
Scott Beamer
commit log now correctly prints privilege
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2015-09-15
Christopher...
Zero-extend flw, fmv_s_x instructions
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2015-09-12
Scott Beamer
print out current privilege level (if commit log enabled)
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2015-09-12
Scott Beamer
print out commit log (if enabled) for all privilege...
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2015-09-11
Andrew Waterman
Simplify register_base_instructions
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2015-09-11
Andrew Waterman
Initialize mstatus.prv1/prv2 to U, not S
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2015-09-11
Andrew Waterman
Support 'G' in ISA strings
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2015-09-11
Andrew Waterman
Merge pull request #32 from riscv/insn-list
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2015-09-11
Albert Ou
Fix non-portable sed commands generating insn_list.h
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2015-09-09
Andrew Waterman
Improve instruction fetch
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2015-09-08
Andrew Waterman
Add facility to instrument specific opcodes
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2015-09-08
Andrew Waterman
Refer to LICENSE in some newer source files
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2015-09-04
Andrew Waterman
Move towards RVC v1.8
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2015-09-02
Andrew Waterman
Don't automatically run autoconf
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2015-08-06
Andrew Waterman
Merge pull request #29 from pmundkur/devel
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2015-08-06
Prashanth Mundkur
Add an option (-l) to display a log of execution in...
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2015-07-30
Christopher...
Added error message when trying to use histogram
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2015-07-21
Christopher...
Update README.md for freg info
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2015-07-15
Andrew Waterman
Merge pull request #28 from sbeamer/master
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2015-07-13
Scott Beamer
simplified default case and added comments
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2015-07-11
Andrew Waterman
Merge pull request #27 from sbeamer/master
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2015-07-11
Scott Beamer
fix clang compile error
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2015-07-05
Andrew Waterman
New machine-mode timer facility
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2015-06-06
Andrew Waterman
Merge pull request #25 from vapier/master
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2015-06-05
Mike Frysinger
allow interactive "reg" command to dump all registers
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2015-06-05
Mike Frysinger
add an interactive "pc" command
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2015-06-05
Mike Frysinger
unify interactive core processing
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2015-06-04
Andrew Waterman
Merge pull request #24 from vapier/master
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2015-06-04
Mike Frysinger
add aliases for common interactive functions
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2015-06-04
Mike Frysinger
add a help screen to interactive mode
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2015-06-03
Andrew Waterman
Merge pull request #23 from vapier/master
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2015-06-03
Mike Frysinger
move interactive function init out of main loop
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2015-06-01
Andrew Waterman
Use single, shared real-time counter
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2015-06-01
Andrew Waterman
Execute exactly the # of insns passed to step()
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2015-06-01
Andrew Waterman
Add rest of RV32C instructions
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2015-06-01
Andrew Waterman
Fix performance bug when CSR accesses are common
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2015-06-01
Andrew Waterman
Fix c.slliw implementation
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2015-06-01
Andrew Waterman
New RV64C proposal
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2015-06-01
Andrew Waterman
Take interrupts as soon as interrupts are enabled
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2015-05-15
Andrew Waterman
Merge pull request #20 from palmer-dabbelt/package
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2015-05-14
Andrew Waterman
Fix VM, MIP encoding
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2015-05-13
Palmer Dabbelt
Install "disasm.h"
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2015-05-13
Palmer Dabbelt
autoreconf 126beb482ff6 ("Install pkg-config files...
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2015-05-13
Palmer Dabbelt
Install pkg-config files for Spike
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2015-05-13
Palmer Dabbelt
Change the behavior of the DESTDIR make variable
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2015-05-09
Andrew Waterman
Upgrade to privileged architecture 1.7
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2015-04-30
Andrew Waterman
Fix commit log for CSR instructions
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2015-04-26
Andrew Waterman
Fix I$ simulator hit count
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2015-04-14
Andrew Waterman
Merge pull request #18 from wsong83/master
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2015-04-13
Wei Song
fix cache line index offset in cachesim.cc
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2015-04-09
Andrew Waterman
Fix autoconf for RHEL6
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2015-04-04
Andrew Waterman
Check for F extension when accessing FCSR
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2015-04-04
Andrew Waterman
Support setting ISA/subsets with --isa flag
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2015-04-02
Andrew Waterman
Simplify RV32 comparisons
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2015-03-31
Andrew Waterman
Allow writing mstatus.fs even if FPU isn't present
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2015-03-31
Andrew Waterman
Implement RVC draft
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2015-03-27
Andrew Waterman
Serialize counters without throwing C++ exceptions
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2015-03-27
Andrew Waterman
New virtual memory implementation (Sv39)
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2015-03-26
Andrew Waterman
Update state.pc on every instruction
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2015-03-21
Andrew Waterman
For misaligned fetch, set mepc = addr of branch/jump
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2015-03-17
Yunsup Lee
bugfix, mbadaddr should be writable
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2015-03-17
Yunsup Lee
change hwacha cause to follow risc-v cause
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2015-03-17
Andrew Waterman
Merge [shm]call into ecall, [shm]ret into eret
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2015-03-16
Yunsup Lee
bugfix in raising accelerator interrupts
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2015-03-16
Yunsup Lee
vxcptsave->vxcptevac,vxcptrestore->vxcpthold
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