First working version of the Flexlib + P&R flow for the ls180+SRAM.
[soclayout.git] / experiments3 /
drwxr-xr-x   ..
-rwxr-xr-x 654 Makefile3
-rwxr-xr-x 619 Makefile4
drwxr-xr-x - coriolis2
lrwxrwxrwx 11 mksym.sh -> ../mksym.sh
-rw-r--r-- 28 nets3.txt
-rw-r--r-- 17 nets4.txt
-rw-r--r-- 2097 test_part_add.py