update to new ls180.il (no core yet) with PLL I/O and I2C
[soclayout.git] / experiments9 /
drwxr-xr-x   ..
-rw-r--r-- 11 .gitignore
-rw-r--r-- 3648 GUIDELINES.rst
-rwxr-xr-x 1135 Makefile
-rwxr-xr-x 82 build.sh
-rw-r--r-- 6 cells.lst
-rw-r--r-- 2290 cells_orig.lst
drwxr-xr-x - coriolis2
-rw-r--r-- 39289 doDesign.py
-rw-r--r-- 5948 doDesignFlat.py
-rw-r--r-- 188 flatten.lst
-rwxr-xr-x 1035 mksym.sh
drwxr-xr-x - non_generated