arch: [Patch 1/5] Added RISC-V base instruction set RV64I
[gem5.git] / src / arch / riscv / isa /
drwxr-xr-x   ..
-rw-r--r-- 2795 base.isa
-rw-r--r-- 2587 bitfields.isa
-rw-r--r-- 9935 decoder.isa
drwxr-xr-x - formats
-rw-r--r-- 2854 includes.isa
-rw-r--r-- 2480 main.isa
-rw-r--r-- 2335 operands.isa