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use name of unit to write simulator/vcd file
[soc.git] / src / soc / fu / compunits / test /
drwxr-xr-x   ..
-rw-r--r-- 2649 test_alu_compunit.py blob | history | raw
-rw-r--r-- 2048 test_branch_compunit.py blob | history | raw
-rw-r--r-- 7104 test_compunit.py blob | history | raw
-rw-r--r-- 2031 test_cr_compunit.py blob | history | raw
-rw-r--r-- 2513 test_ldst_compunit.py blob | history | raw
-rw-r--r-- 2471 test_logical_compunit.py blob | history | raw
-rw-r--r-- 2621 test_shiftrot_compunit.py blob | history | raw