pass SVP64 ReMap field through to core and then on to FU decoders
[soc.git] / src / soc / simple /
drwxr-xr-x   ..
-rw-r--r-- 0 __init__.py
-rw-r--r-- 23620 core.py
-rw-r--r-- 57204 issuer.py
-rw-r--r-- 5101 issuer_verilog.py
drwxr-xr-x - test