sort out core write latching: gate by busy, and use CompUnit dest output
[soc.git] / src / soc / simple /
drwxr-xr-x   ..
-rw-r--r-- 0 __init__.py
-rw-r--r-- 15335 core.py
-rw-r--r-- 7550 issuer.py
drwxr-xr-x - test