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crank A7 FPGA speed down to experiment
[ls2.git] / src /
drwxr-xr-x   ..
-rw-r--r-- 593 arty_a7.py blob | history | raw
-rw-r--r-- 18298 arty_crg.py blob | history | raw
-rw-r--r-- 9795 crg.py blob | history | raw
-rw-r--r-- 613 icarusversa.py blob | history | raw
-rw-r--r-- 28130 ls2.py blob | history | raw
-rw-r--r-- 3305 simsoctb.v blob | history | raw