-# NLNet Grants approved: Power ISA under consideration
-
Across several projects, nearly EUR 400,000 worth of additional funding
applications were put in, and around EUR 200,000 to 250,000 of those have
been approved. The RISC-V Foundation's continued extreme unethical
actions have led us to consider using Power ISA.
-# NLNet Grants
+### NLNet Grants
[NLNet](http://nlnet.nl) were first approached eighteen months ago, with
an initial application to develop the core of a privacy-respecting trustable
The [additional proposals](https://libre-riscv.org/nlnet_proposals/)
expand on the core, to cover:
-* Formal Mathematical correctness proofs for the entire processor, including
+* formal mathematical correctness proofs for the entire processor, including
the FPU (no more Intel Pentium FPDIV bugs...)
-* a special Video Acceleration focus, adding video decode instructions
-* an additional 3D Driver based on AMDVLK or MESA
+* a special video acceleration focus, adding video decode instructions
+* an additional 3D driver based on AMDVLK or MESA
* some funding to be able to properly develop and document ISA standards
-* a Wishbone Streaming enhancement to add A/V timecode stamps to Wishbone B4,
- and to develop independent libre-licensed peripherals as examples.
-* two inter-related proposals to develop Libre Cell Libraries
- ([Chips4Makers](http://chips4makers.be)), to be used
- by a team at [LIP6.fr](http://lip6.fr)
- using the Alliance / Coriolis2 ASIC layout tools.
- Additional funding will go to the nmigen team for ASIC improvements and
- special integration with Coriolis2.
-
-The goal here is to get to a working, commercially-saleable 180nm single-core
-ASIC at around 300 to 350mhz, suitable for use as a high-end Embedded
-Controller. Staf from Chips4Makers will act as the "NDA firebreak" between
-us and TSMC.
+* a Wishbone streaming enhancement to add A/V timecode stamps to Wishbone B4,
+ and to develop independent libre-licensed peripherals as examples
+* two interrelated proposals to develop libre cell Libraries
+ ([Chips4Makers](http://chips4makers.io/)), to be used by a team at
+ [LIP6.fr](http://lip6.fr) using the Alliance / Coriolis2 ASIC layout
+ tools; Additional funding will go to the nmigen team for ASIC
+ improvements and special integration with Coriolis2
+
+The goal here is to get to a working, commercially viable 180 nm
+single-core ASIC at around 300 to 350 MHz, suitable for use as a
+high-end embedded controller. Staf from Chips4Makers will act as the
+"NDA firebreak" between us and TSMC. (Side note: Staf ran a [Crowd
+Supply campaign](https://www.crowdsupply.com/chips4makers/retro-uc),
+and the NLNet funding will help him to realise that project and
+perhaps re-start a new campaign for the Retro-uC one day).
All of these have been approved by NLNet, and, crucially, the external
independent review process successfully completed for each. The exact
Part of the process was a little tricky, initially: the independent reviewers
expressed surprise at the amounts being requested for *sub*-tasks when the
-initial application was so small. The reason was very simple: both Jacob
+initial application back in December 2019 was so small, relative to
+the intended goal. The reason was very simple: both Jacob
and I have unique low-income circumstances that simply do not need European /
Western style living expenses. Whereas, when we get to much more specialist
-tasks (such as formal mathematical proofs, Video assembly-level drivers,
-and so on), these fields are so specialist that finding people who are good
-*and* who are able to exist on student or S.E.Asia level funding is just not
+tasks (such as formal mathematical proofs, video assembly-level drivers,
+and so on), these fields are so specialized that finding people who are good
+*and* who are able to exist on student or southeast-asia-level funding is just not
practical.
-We therefore made sure that the calculations were based around an approximate
+Therefore, we made sure that the calculations were based around an approximate
EUR 3,000 per month budget per person, bearing in mind that due to NLNet's
-International Tax Agreements, this being donations, that's equivalent to a
+international tax agreements, this being donations, that's equivalent to a
"wage" of approximately nearly twice that amount (three times if, as a
-business, you have to take into consideration Corporation Tax / Employee
-Insurance as well).
+business, you have to take into consideration corporation tax / employee
+insurance as well).
-We therefore need to find people willing to help do the work, and what is
-really nice: NLNet will donate money to them for completion of that work!
+We now need to find people willing to help do the work. What is
+really nice is that NLNet will donate money to them for completion of that work!
Therefore, if you've always wanted to work on a 3D processor, its drivers
and its source code, do get in touch.
-# PowerPC.
+### PowerPC
This is a
[long story](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-October/003035.html)
that was picked up by
[Phoronix](https://www.phoronix.com/scan.php?page=news_item&px=Libre-RISC-V-Eyeing-POWER)
-before we had a chance to make any kind of real "announcement". That said:
+before we had a chance to make any kind of real "announcement." However,
we're always really grateful to Michael for his coverage of the Libre SoC,
-as it always sparks some insightful, useful and engaging discussions.
+as it always sparks some insightful, useful, and engaging discussions.
The summary is this: Libre and Open contributors to RISC-V have been
disregarded for several years. **Long** before I joined the RISC-V
-Mailing lists, it was *well-known* within that small and tightly-knit
-community that if you were not associated directly with UCB, you were
+mailing lists, it was *well-known* within that small and tightly-knit
+community that if you were not associated directly with UC Berkeley, you were
basically not welcome. Caveat: if you signed the NDA-like agreement
which conflicts directly with, for example, the Debian Charter and
-the whole purpose of Libre Licenses, then you got a "voice" and you
+the whole purpose of libre licenses, then you got a "voice" and you
got access to the closed and secretive RISC-V resources and mailing
lists.
Michael puts it extremely well: I have absolutely no problem with the
ISA itself, it's the abuse of power and the flagrant ignoring and abuse
-of basic tenets of Trademark Law that are just completely untenable.
+of basic tenets of trademark law that are just completely untenable.
Not only that: one well-paid employee of SiFive has *repeatedly* engaged
in defamation attacks for over eighteen months. Even raising a formal
complaint through the newly-established relationship with the Linux
Foundation failed to keep that individual under control. Also adversely
impacted was the newly-established Open Graphics Alliance initiative,
which was independently started by Pixilica back in October,
-proposed at SIGGRAPH 2019 and welcomed by world-leading 3D Industry
+proposed at SIGGRAPH 2019 and welcomed by world-leading 3D industry
experts.
At some point you just have to appreciate that to continue to support
good and necessary thing. With this **formally** in place as part
of an officially-approved Power ISA Standard, not only could our team
expand the Power ISA in a safe and controlled fashion, so could other
- adopters.
+ adopters of the Power ISA.
* that the core OpenPower members had *already been discussing* how to make
- sure that new Libre Teams with a commercial focus could join and not
+ sure that new Libre teams with a commercial focus could join and not
have any transparency / patent / NDA / royalty / licensing conflicts
- of interest. The only major thing that the other members wanted was
- a "P.R. blackout period", right around the time of announcement of
- new Standards, which sounds perfectly reasonable to me.
+ of interest. The only major thing that the other members particularly
+ wanted was a "public relations blackout period," right around the time
+ of announcement of new standards, which sounds perfectly reasonable
+ to me.
* that IBM will be providing a royalty-free unlimited license grant
for *all* of its patents, as long as firstly the licensees do not
make any effort to assert patents **against** IBM, and secondly,
as long as implementations are fully-compliant with the OpenPower
- Standards.
+ standards.
* that there is discussion underway as to the creation and maintenance
- of Formal Compliance Test Suites, just as there is today with the
+ of formal compliance test suites, just as there is today with the
RISC-V ISA.
-* that the use of a Certification Mark - not a Service Mark or a Trade Mark -
- is the most appropriate thing for ISA Standards. I mentioned this
+* that the use of a certification mark - not a service mark or a trade mark -
+ is the most appropriate thing for ISA standards. I mentioned this
only briefly however it takes a lot more than 15 minutes to properly
- explain, so I am not going to push it: Hugh is doing so much already.
+ explain, so I am not going to push it: Hugh is doing so much fantastic
+ work already.
It was a very busy and positive conversation, where it is clear that
-we caught them right at the beginning of the process. Consequently,
+we caught them at just the right time in the process. Consequently,
my discussion with Hugh was just at the right time. Without that,
-the existing OpenPower Members might never have really truly believed
-that any Libre **Commercial** project would ever in fact come forward
-(that the steps that they were taking were purely hypothetical).
-Out of the blue (pun intended) I contact Hugh and highlight that no,
+the existing OpenPower members might never have really truly believed
+that any Libre **commercial** project would ever in fact come forward
+and that the steps the OpenPower members were taking were purely hypothetical.
+Out of the blue (pun intended), I contact Hugh and highlight that no,
it's not hypothetical.
The next step, then, will be to wait until mid-january when people come
-back from holiday, and wait for the announcement of the Open Power
-License Agreement. Hugh reassures me that there's nothing spectacularly
+back from holiday, and wait for the announcement of the OpenPower
+license agreement. Hugh reassures me that there's nothing spectacularly
controversial in it, and given his long-standing experience of several
decades with the Libre and Open Communities, I cannot think of a reason
why it would not be possible to sign it. We just have to see.
The timing here with NLNet is just on the edge: we have to create a
full list of milestones and assign a fixed budget to each (then later
subdivide them into sub-tasks under that milestone). This is a leeeetle
-bit challenging when we have not yet reviewed the Open Power Agreement,
-however given that the majority of the tasks are ISA-independent, it
+bit challenging when we have not yet reviewed the OpenPower agreement,
+however, given that the majority of the tasks are ISA-independent, it
will actually work out fine.
The only other major thing: what the heck do we do with the libre-riscv.org
domain? As you can see on the mailing list decision, we decided to go
-with a *userspace* RV64GC dual-ISA front-end. **userspace** RISC-V POSIX
+with a *userspace* RV64GC dual-ISA front-end. **Userspace** RISC-V POSIX
(Linux / Android) applications will work perfectly well, as will **userspace**
PowerISA POSIX applications, however the **kernel** (supervisor) space will
be entirely PowerISA.
-The Video and 3D acceleration opcodes will be **entirely in the Power ISA**.
-We are sick and tired of the RISC-V Foundation's blatant mismanagement:
-therefore we will comply to the absolute minimal letter with RV64GC for
-the benefit of our users, backers and sponsors, however RISC-V and the
-RISC-V ISA itself
-will no longer receive the benefit of the advancements and innovation
-that we have received funding and support to develop.
+The video and 3D acceleration opcodes will be **entirely in the Power
+ISA**. We are sick and tired of the RISC-V Foundation's intransigence
+and blatant mismanagement. Therefore, we will comply to the absolute
+minimal letter with RV64GC for the benefit of our users, backers, and
+sponsors who will be expecting RISC-V Compliance. However, RISC-V and the
+RISC-V ISA itself will no longer receive the benefit of the advancements
+and innovation that we have received funding and support to develop.
-Therefore: the assembly-code being written by hand for the Video Acceleration
+So, the assembly-code being written by hand for the video acceleration
side, as well as the 3D drivers for Kazan and MESA, will "flip" from RV64GC
RISC-V over to the Power ISA, which will be fully 3D accelerated with advanced
Simple-V Vector operations, then return back to userspace RISC-V RV64GC ISA
to continue serving the user application.
-Next steps for us include setting up a Foundation under which the processor
-can be developed, and to look towards the next major funding step: USD 10m
-to 20m.
+Next steps for us include setting up a foundation under which the processor
+can be developed, and to look towards the next major funding step: USD 10M
+to 20M.
projects / crowdsupply.git / blobdiff