Merge ARM into the head. ARM will compile but may not actually work.
[gem5.git] / src / arch / arm / stacktrace.hh
1 /*
2 * Copyright (c) 2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Ali Saidi
30 * Stephen Hines
31 */
32
33 #ifndef __ARCH_ARM_STACKTRACE_HH__
34 #define __ARCH_ARM_STACKTRACE_HH__
35
36 #include "base/trace.hh"
37 #include "cpu/static_inst.hh"
38
39 class ThreadContext;
40 class StackTrace;
41
42 namespace ArmISA
43 {
44
45 class ProcessInfo
46 {
47 private:
48 ThreadContext *tc;
49
50 int thread_info_size;
51 int task_struct_size;
52 int task_off;
53 int pid_off;
54 int name_off;
55
56 public:
57 ProcessInfo(ThreadContext *_tc);
58
59 Addr task(Addr ksp) const;
60 int pid(Addr ksp) const;
61 std::string name(Addr ksp) const;
62 };
63
64 class StackTrace
65 {
66 protected:
67 typedef TheISA::MachInst MachInst;
68 private:
69 ThreadContext *tc;
70 std::vector<Addr> stack;
71
72 private:
73 bool isEntry(Addr addr);
74 bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra);
75 bool decodeSave(MachInst inst, int &reg, int &disp);
76 bool decodeStack(MachInst inst, int &disp);
77
78 void trace(ThreadContext *tc, bool is_call);
79
80 public:
81 StackTrace();
82 StackTrace(ThreadContext *tc, StaticInstPtr inst);
83 ~StackTrace();
84
85 void clear()
86 {
87 tc = 0;
88 stack.clear();
89 }
90
91 bool valid() const { return tc != NULL; }
92 bool trace(ThreadContext *tc, StaticInstPtr inst);
93
94 public:
95 const std::vector<Addr> &getstack() const { return stack; }
96
97 static const int user = 1;
98 static const int console = 2;
99 static const int unknown = 3;
100
101 #if TRACING_ON
102 private:
103 void dump();
104
105 public:
106 void dprintf() { if (DTRACE(Stack)) dump(); }
107 #else
108 public:
109 void dprintf() {}
110 #endif
111 };
112
113 inline bool
114 StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
115 {
116 if (!inst->isCall() && !inst->isReturn())
117 return false;
118
119 if (valid())
120 clear();
121
122 trace(tc, !inst->isReturn());
123 return true;
124 }
125
126 }
127
128 #endif // __ARCH_ARM_STACKTRACE_HH__