2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Nathan Binkert
33 #ifndef __ARCH_MIPS_VTOPHYS_H__
34 #define __ARCH_MIPS_VTOPHYS_H__
36 #include "arch/mips/isa_traits.hh"
37 #include "arch/mips/utility.hh"
44 inline Addr PteAddr(Addr a) { return (a & PteMask) << PteShift; }
47 inline bool IsUSeg(Addr a) { return USegBase <= a && a <= USegEnd; }
49 inline bool IsKSeg0(Addr a) { return KSeg0Base <= a && a <= KSeg0End; }
51 inline Addr KSeg02Phys(Addr addr) { return addr & KSeg0Mask; }
53 inline Addr KSeg12Phys(Addr addr) { return addr & KSeg1Mask; }
55 inline bool IsKSeg1(Addr a) { return KSeg1Base <= a && a <= KSeg1End; }
57 inline bool IsKSSeg(Addr a) { return KSSegBase <= a && a <= KSSegEnd; }
59 inline bool IsKSeg3(Addr a) { return KSeg3Base <= a && a <= KSeg3End; }
62 Addr vtophys(Addr vaddr);
63 Addr vtophys(ThreadContext *tc, Addr vaddr);
66 #endif // __ARCH_MIPS_VTOPHYS_H__