60aa6d0cc5027115c6b8c648100558f0ec6ff050
[gem5.git] / src / arch / x86 / regs / int.hh
1 /*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40 #ifndef __ARCH_X86_INTREGS_HH__
41 #define __ARCH_X86_INTREGS_HH__
42
43 #include "arch/x86/x86_traits.hh"
44 #include "base/bitunion.hh"
45 #include "base/misc.hh"
46 #include "sim/core.hh"
47
48 namespace X86ISA
49 {
50 BitUnion64(X86IntReg)
51 Bitfield<63,0> R;
52 SignedBitfield<63,0> SR;
53 Bitfield<31,0> E;
54 SignedBitfield<31,0> SE;
55 Bitfield<15,0> X;
56 SignedBitfield<15,0> SX;
57 Bitfield<15,8> H;
58 SignedBitfield<15,8> SH;
59 Bitfield<7, 0> L;
60 SignedBitfield<7, 0> SL;
61 EndBitUnion(X86IntReg)
62
63 enum IntRegIndex
64 {
65 INTREG_RAX,
66 INTREG_EAX = INTREG_RAX,
67 INTREG_AX = INTREG_RAX,
68 INTREG_AL = INTREG_RAX,
69
70 INTREG_RCX,
71 INTREG_ECX = INTREG_RCX,
72 INTREG_CX = INTREG_RCX,
73 INTREG_CL = INTREG_RCX,
74
75 INTREG_RDX,
76 INTREG_EDX = INTREG_RDX,
77 INTREG_DX = INTREG_RDX,
78 INTREG_DL = INTREG_RDX,
79
80 INTREG_RBX,
81 INTREG_EBX = INTREG_RBX,
82 INTREG_BX = INTREG_RBX,
83 INTREG_BL = INTREG_RBX,
84
85 INTREG_RSP,
86 INTREG_ESP = INTREG_RSP,
87 INTREG_SP = INTREG_RSP,
88 INTREG_SPL = INTREG_RSP,
89 INTREG_AH = INTREG_RSP,
90
91 INTREG_RBP,
92 INTREG_EBP = INTREG_RBP,
93 INTREG_BP = INTREG_RBP,
94 INTREG_BPL = INTREG_RBP,
95 INTREG_CH = INTREG_RBP,
96
97 INTREG_RSI,
98 INTREG_ESI = INTREG_RSI,
99 INTREG_SI = INTREG_RSI,
100 INTREG_SIL = INTREG_RSI,
101 INTREG_DH = INTREG_RSI,
102
103 INTREG_RDI,
104 INTREG_EDI = INTREG_RDI,
105 INTREG_DI = INTREG_RDI,
106 INTREG_DIL = INTREG_RDI,
107 INTREG_BH = INTREG_RDI,
108
109 INTREG_R8,
110 INTREG_R8D = INTREG_R8,
111 INTREG_R8W = INTREG_R8,
112 INTREG_R8B = INTREG_R8,
113
114 INTREG_R9,
115 INTREG_R9D = INTREG_R9,
116 INTREG_R9W = INTREG_R9,
117 INTREG_R9B = INTREG_R9,
118
119 INTREG_R10,
120 INTREG_R10D = INTREG_R10,
121 INTREG_R10W = INTREG_R10,
122 INTREG_R10B = INTREG_R10,
123
124 INTREG_R11,
125 INTREG_R11D = INTREG_R11,
126 INTREG_R11W = INTREG_R11,
127 INTREG_R11B = INTREG_R11,
128
129 INTREG_R12,
130 INTREG_R12D = INTREG_R12,
131 INTREG_R12W = INTREG_R12,
132 INTREG_R12B = INTREG_R12,
133
134 INTREG_R13,
135 INTREG_R13D = INTREG_R13,
136 INTREG_R13W = INTREG_R13,
137 INTREG_R13B = INTREG_R13,
138
139 INTREG_R14,
140 INTREG_R14D = INTREG_R14,
141 INTREG_R14W = INTREG_R14,
142 INTREG_R14B = INTREG_R14,
143
144 INTREG_R15,
145 INTREG_R15D = INTREG_R15,
146 INTREG_R15W = INTREG_R15,
147 INTREG_R15B = INTREG_R15,
148
149 NUM_INTREGS
150 };
151
152 // This needs to be large enough to miss all the other bits of an index.
153 static const IntRegIndex IntFoldBit = (IntRegIndex)(1 << 6);
154
155 inline static IntRegIndex
156 INTREG_MICRO(int index)
157 {
158 return (IntRegIndex)(NUM_INTREGS + index);
159 }
160
161 inline static IntRegIndex
162 INTREG_IMPLICIT(int index)
163 {
164 return (IntRegIndex)(NUM_INTREGS + NumMicroIntRegs + index);
165 }
166
167 inline static IntRegIndex
168 INTREG_FOLDED(int index, int foldBit)
169 {
170 if ((index & 0x1C) == 4 && foldBit)
171 index = (index - 4) | foldBit;
172 return (IntRegIndex)index;
173 }
174 }
175
176 #endif // __ARCH_X86_INTREGS_HH__