2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include "sim/pseudo_inst.hh"
36 #include "arch/vtophys.hh"
37 #include "cpu/base.hh"
38 #include "cpu/sampler/sampler.hh"
39 #include "cpu/exec_context.hh"
40 #include "cpu/quiesce_event.hh"
41 #include "kern/kernel_stats.hh"
42 #include "sim/param.hh"
43 #include "sim/serialize.hh"
44 #include "sim/sim_exit.hh"
45 #include "sim/stat_control.hh"
46 #include "sim/stats.hh"
47 #include "sim/system.hh"
48 #include "sim/debug.hh"
49 #include "sim/vptr.hh"
53 extern Sampler
*SampCPU
;
55 using namespace Stats
;
56 using namespace TheISA
;
60 bool doStatisticsInsts
;
61 bool doCheckpointInsts
;
67 if (xc
->getKernelStats())
68 xc
->getKernelStats()->arm();
72 quiesce(ExecContext
*xc
)
78 if (xc
->getKernelStats())
79 xc
->getKernelStats()->quiesce();
83 quiesceNs(ExecContext
*xc
, uint64_t ns
)
85 if (!doQuiesce
|| ns
== 0)
88 EndQuiesceEvent
*quiesceEvent
= xc
->getQuiesceEvent();
90 if (quiesceEvent
->scheduled())
91 quiesceEvent
->reschedule(curTick
+ Clock::Int::ns
* ns
);
93 quiesceEvent
->schedule(curTick
+ Clock::Int::ns
* ns
);
96 if (xc
->getKernelStats())
97 xc
->getKernelStats()->quiesce();
101 quiesceCycles(ExecContext
*xc
, uint64_t cycles
)
103 if (!doQuiesce
|| cycles
== 0)
106 EndQuiesceEvent
*quiesceEvent
= xc
->getQuiesceEvent();
108 if (quiesceEvent
->scheduled())
109 quiesceEvent
->reschedule(curTick
+
110 xc
->getCpuPtr()->cycles(cycles
));
112 quiesceEvent
->schedule(curTick
+
113 xc
->getCpuPtr()->cycles(cycles
));
116 if (xc
->getKernelStats())
117 xc
->getKernelStats()->quiesce();
121 quiesceTime(ExecContext
*xc
)
123 return (xc
->readLastActivate() - xc
->readLastSuspend()) / Clock::Int::ns
;
127 ivlb(ExecContext
*xc
)
129 if (xc
->getKernelStats())
130 xc
->getKernelStats()->ivlb();
134 ivle(ExecContext
*xc
)
139 m5exit_old(ExecContext
*xc
)
141 SimExit(curTick
, "m5_exit_old instruction encountered");
145 m5exit(ExecContext
*xc
, Tick delay
)
147 Tick when
= curTick
+ delay
* Clock::Int::ns
;
148 SimExit(when
, "m5_exit instruction encountered");
152 resetstats(ExecContext
*xc
, Tick delay
, Tick period
)
154 if (!doStatisticsInsts
)
158 Tick when
= curTick
+ delay
* Clock::Int::ns
;
159 Tick repeat
= period
* Clock::Int::ns
;
161 using namespace Stats
;
162 SetupEvent(Reset
, when
, repeat
);
166 dumpstats(ExecContext
*xc
, Tick delay
, Tick period
)
168 if (!doStatisticsInsts
)
172 Tick when
= curTick
+ delay
* Clock::Int::ns
;
173 Tick repeat
= period
* Clock::Int::ns
;
175 using namespace Stats
;
176 SetupEvent(Dump
, when
, repeat
);
180 addsymbol(ExecContext
*xc
, Addr addr
, Addr symbolAddr
)
183 CopyStringOut(xc
, symb
, symbolAddr
, 100);
184 std::string
symbol(symb
);
186 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
188 xc
->getSystemPtr()->kernelSymtab
->insert(addr
,symbol
);
192 dumpresetstats(ExecContext
*xc
, Tick delay
, Tick period
)
194 if (!doStatisticsInsts
)
198 Tick when
= curTick
+ delay
* Clock::Int::ns
;
199 Tick repeat
= period
* Clock::Int::ns
;
201 using namespace Stats
;
202 SetupEvent(Dump
|Reset
, when
, repeat
);
206 m5checkpoint(ExecContext
*xc
, Tick delay
, Tick period
)
208 if (!doCheckpointInsts
)
212 Tick when
= curTick
+ delay
* Clock::Int::ns
;
213 Tick repeat
= period
* Clock::Int::ns
;
215 Checkpoint::setup(when
, repeat
);
219 readfile(ExecContext
*xc
, Addr vaddr
, uint64_t len
, uint64_t offset
)
221 const string
&file
= xc
->getCpuPtr()->system
->params()->readfile
;
228 int fd
= ::open(file
.c_str(), O_RDONLY
, 0);
230 panic("could not open file %s\n", file
);
232 if (::lseek(fd
, offset
, SEEK_SET
) < 0)
233 panic("could not seek: %s", strerror(errno
));
235 char *buf
= new char[len
];
238 int bytes
= ::read(fd
, p
, len
);
248 CopyIn(xc
, vaddr
, buf
, result
);
253 class Context
: public ParamContext
256 Context(const string
§ion
) : ParamContext(section
) {}
260 Context
context("pseudo_inst");
262 Param
<bool> __quiesce(&context
, "quiesce",
263 "enable quiesce instructions",
265 Param
<bool> __statistics(&context
, "statistics",
266 "enable statistics pseudo instructions",
268 Param
<bool> __checkpoint(&context
, "checkpoint",
269 "enable checkpoint pseudo instructions",
273 Context::checkParams()
275 doQuiesce
= __quiesce
;
276 doStatisticsInsts
= __statistics
;
277 doCheckpointInsts
= __checkpoint
;
280 void debugbreak(ExecContext
*xc
)
285 void switchcpu(ExecContext
*xc
)
288 SampCPU
->switchCPUs();