src/sim/sim_object.cc

   1 /*
   2  * Copyright (c) 2001-2005 The Regents of The University of Michigan
   3  * Copyright (c) 2010 Advanced Micro Devices, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  * Authors: Steve Reinhardt
  30  *          Nathan Binkert
  31  */
  32
  33 #include "sim/sim_object.hh"
  34
  35 #include "base/logging.hh"
  36 #include "base/match.hh"
  37 #include "base/trace.hh"
  38 #include "debug/Checkpoint.hh"
  39 #include "sim/probe/probe.hh"
  40
  41 using namespace std;
  42
  43
  44 ////////////////////////////////////////////////////////////////////////
  45 //
  46 // SimObject member definitions
  47 //
  48 ////////////////////////////////////////////////////////////////////////
  49
  50 //
  51 // static list of all SimObjects, used for initialization etc.
  52 //
  53 SimObject::SimObjectList SimObject::simObjectList;
  54
  55 //
  56 // SimObject constructor: used to maintain static simObjectList
  57 //
  58 SimObject::SimObject(const Params *p)
  59     : EventManager(getEventQueue(p->eventq_index)), _params(p)
  60 {
  61 #ifdef DEBUG
  62     doDebugBreak = false;
  63 #endif
  64     simObjectList.push_back(this);
  65     probeManager = new ProbeManager(this);
  66 }
  67
  68 SimObject::~SimObject()
  69 {
  70     delete probeManager;
  71 }
  72
  73 void
  74 SimObject::init()
  75 {
  76 }
  77
  78 void
  79 SimObject::loadState(CheckpointIn &cp)
  80 {
  81     if (cp.sectionExists(name())) {
  82         DPRINTF(Checkpoint, "unserializing\n");
  83         // This works despite name() returning a fully qualified name
  84         // since we are at the top level.
  85         unserializeSection(cp, name());
  86     } else {
  87         DPRINTF(Checkpoint, "no checkpoint section found\n");
  88     }
  89 }
  90
  91 void
  92 SimObject::initState()
  93 {
  94 }
  95
  96 void
  97 SimObject::startup()
  98 {
  99 }
 100
 101 //
 102 // no default statistics, so nothing to do in base implementation
 103 //
 104 void
 105 SimObject::regStats()
 106 {
 107 }
 108
 109 void
 110 SimObject::resetStats()
 111 {
 112 }
 113
 114 /**
 115  * No probe points by default, so do nothing in base.
 116  */
 117 void
 118 SimObject::regProbePoints()
 119 {
 120 }
 121
 122 /**
 123  * No probe listeners by default, so do nothing in base.
 124  */
 125 void
 126 SimObject::regProbeListeners()
 127 {
 128 }
 129
 130 ProbeManager *
 131 SimObject::getProbeManager()
 132 {
 133     return probeManager;
 134 }
 135
 136 //
 137 // static function: serialize all SimObjects.
 138 //
 139 void
 140 SimObject::serializeAll(CheckpointOut &cp)
 141 {
 142     SimObjectList::reverse_iterator ri = simObjectList.rbegin();
 143     SimObjectList::reverse_iterator rend = simObjectList.rend();
 144
 145     for (; ri != rend; ++ri) {
 146         SimObject *obj = *ri;
 147         // This works despite name() returning a fully qualified name
 148         // since we are at the top level.
 149         obj->serializeSection(cp, obj->name());
 150    }
 151 }
 152
 153
 154 #ifdef DEBUG
 155 //
 156 // static function: flag which objects should have the debugger break
 157 //
 158 void
 159 SimObject::debugObjectBreak(const string &objs)
 160 {
 161     SimObjectList::const_iterator i = simObjectList.begin();
 162     SimObjectList::const_iterator end = simObjectList.end();
 163
 164     ObjectMatch match(objs);
 165     for (; i != end; ++i) {
 166         SimObject *obj = *i;
 167         obj->doDebugBreak = match.match(obj->name());
 168    }
 169 }
 170
 171 void
 172 debugObjectBreak(const char *objs)
 173 {
 174     SimObject::debugObjectBreak(string(objs));
 175 }
 176 #endif
 177
 178 SimObject *
 179 SimObject::find(const char *name)
 180 {
 181     SimObjectList::const_iterator i = simObjectList.begin();
 182     SimObjectList::const_iterator end = simObjectList.end();
 183
 184     for (; i != end; ++i) {
 185         SimObject *obj = *i;
 186         if (obj->name() == name)
 187             return obj;
 188     }
 189
 190     return NULL;
 191 }