arch: Fix VecReg container alignement to 128bits view
[gem5.git] / tests / long / fs / 10.linux-boot / ref / arm / linux / realview64-o3-dual / simout
1 Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual/simout
2 Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual/simerr
3 gem5 Simulator System. http://gem5.org
4 gem5 is copyrighted software; use the --copyright option for details.
5
6 gem5 compiled Oct 11 2016 00:00:58
7 gem5 started Oct 13 2016 20:43:00
8 gem5 executing on e108600-lin, pid 17330
9 command line: /work/curdun01/gem5-external.hg/build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual -re /work/curdun01/gem5-external.hg/tests/testing/../run.py long/fs/10.linux-boot/arm/linux/realview64-o3-dual
10
11 Selected 64-bit ARM architecture, updating default disk image...
12 Global frequency set at 1000000000000 ticks per second
13 info: kernel located at: /arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch64.20140821
14 info: Using bootloader at address 0x10
15 info: Using kernel entry physical address at 0x80080000
16 info: Loading DTB file: /arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
17 info: Entering event queue @ 0. Starting simulation...
18 Exiting @ tick 47384942719000 because m5_exit instruction encountered