tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats

   1
   2 ================ Begin RubySystem Configuration Print ================
   3
   4 RubySystem config:
   5   random_seed: 1234
   6   randomization: 0
   7   cycle_period: 1
   8   block_size_bytes: 64
   9   block_size_bits: 6
  10   memory_size_bytes: 134217728
  11   memory_size_bits: 27
  12
  13 Network Configuration
  14 ---------------------
  15 network: SIMPLE_NETWORK
  16 topology:
  17
  18 virtual_net_0: active, ordered
  19 virtual_net_1: active, ordered
  20 virtual_net_2: active, ordered
  21 virtual_net_3: active, ordered
  22 virtual_net_4: active, ordered
  23 virtual_net_5: inactive
  24 virtual_net_6: inactive
  25 virtual_net_7: inactive
  26 virtual_net_8: inactive
  27 virtual_net_9: inactive
  28
  29
  30 Profiler Configuration
  31 ----------------------
  32 periodic_stats_period: 1000000
  33
  34 ================ End RubySystem Configuration Print ================
  35
  36
  37 Real time: Jan/23/2012 04:58:59
  38
  39 Profiler Stats
  40 --------------
  41 Elapsed_time_in_seconds: 0
  42 Elapsed_time_in_minutes: 0
  43 Elapsed_time_in_hours: 0
  44 Elapsed_time_in_days: 0
  45
  46 Virtual_time_in_seconds: 0.3
  47 Virtual_time_in_minutes: 0.005
  48 Virtual_time_in_hours:   8.33333e-05
  49 Virtual_time_in_days:    3.47222e-06
  50
  51 Ruby_current_time: 342698
  52 Ruby_start_time: 0
  53 Ruby_cycles: 342698
  54
  55 mbytes_resident: 44.5703
  56 mbytes_total: 213.352
  57 resident_ratio: 0.208905
  58
  59 ruby_cycles_executed: [ 342699 ]
  60
  61 Busy Controller Counts:
  62 L1Cache-0:0
  63 Directory-0:0
  64
  65
  66 Busy Bank Count:0
  67
  68 sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8465 average:     1 | standard deviation: 0 | 0 8465 ]
  69
  70 All Non-Zero Cycle Demand Cache Accesses
  71 ----------------------------------------
  72 miss_latency: [binsize: 2 max: 377 count: 8464 average: 39.4889 | standard deviation: 72.9776 | 0 6734 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 6 1 3 6 0 334 211 182 529 243 4 4 0 5 2 15 9 4 14 10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 30 18 15 24 37 2 3 0 0 2 2 1 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ]
  73 miss_latency_LD: [binsize: 2 max: 375 count: 1185 average: 110.608 | standard deviation: 87.0282 | 0 458 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 3 0 1 2 0 147 90 74 255 81 2 1 0 3 0 12 3 1 9 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 4 2 11 4 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ]
  74 miss_latency_ST: [binsize: 2 max: 377 count: 865 average: 62.2439 | standard deviation: 89.6671 | 0 592 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 30 31 54 70 0 0 0 1 0 1 0 2 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 8 3 21 0 0 0 0 0 0 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ]
  75 miss_latency_IFETCH: [binsize: 2 max: 285 count: 6414 average: 23.2806 | standard deviation: 57.2661 | 0 5684 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 4 0 155 91 77 220 92 2 3 0 1 2 2 6 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 20 9 5 10 12 2 1 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
  76 miss_latency_L1Cache: [binsize: 1 max: 3 count: 6734 average:     3 | standard deviation: 0 | 0 0 0 6734 ]
  77 miss_latency_Directory: [binsize: 2 max: 377 count: 1730 average: 181.521 | standard deviation: 26.4115 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 6 1 3 6 0 334 211 182 529 243 4 4 0 5 2 15 9 4 14 10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 30 18 15 24 37 2 3 0 0 2 2 1 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ]
  78 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
  79 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
  80 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
  81 miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
  82 imcomplete_wCC_Times: 0
  83 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
  84 miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
  85 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
  86 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average:   159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
  87 imcomplete_dir_Times: 1729
  88 miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 458 average:     3 | standard deviation: 0 | 0 0 0 458 ]
  89 miss_latency_LD_Directory: [binsize: 2 max: 375 count: 727 average: 178.4 | standard deviation: 21.0913 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 3 0 1 2 0 147 90 74 255 81 2 1 0 3 0 12 3 1 9 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 4 2 11 4 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ]
  90 miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 592 average:     3 | standard deviation: 0 | 0 0 0 592 ]
  91 miss_latency_ST_Directory: [binsize: 2 max: 377 count: 273 average: 190.714 | standard deviation: 36.5384 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 30 31 54 70 0 0 0 1 0 1 0 2 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 8 3 21 0 0 0 0 0 0 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ]
  92 miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 5684 average:     3 | standard deviation: 0 | 0 0 0 5684 ]
  93 miss_latency_IFETCH_Directory: [binsize: 2 max: 285 count: 730 average: 181.192 | standard deviation: 25.9199 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 4 0 155 91 77 220 92 2 3 0 1 2 2 6 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 20 9 5 10 12 2 1 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
  94
  95 All Non-Zero Cycle SW Prefetch Requests
  96 ------------------------------------
  97 prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
  98 prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
  99 Request vs. RubySystem State Profile
 100 --------------------------------
 101
 102
 103 filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 104
 105 Message Delayed Cycles
 106 ----------------------
 107 Total_delay_cycles: [binsize: 1 max: 0 count: 3456 average:     0 | standard deviation: 0 | 3456 ]
 108 Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 3456 average:     0 | standard deviation: 0 | 3456 ]
 109   virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 110   virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 1730 average:     0 | standard deviation: 0 | 1730 ]
 111   virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 1726 average:     0 | standard deviation: 0 | 1726 ]
 112   virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 113   virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 114   virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 115   virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 116   virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 117   virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 118   virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 119
 120 Resource Usage
 121 --------------
 122 page_size: 4096
 123 user_time: 0
 124 system_time: 0
 125 page_reclaims: 11770
 126 page_faults: 1
 127 swaps: 0
 128 block_inputs: 8
 129 block_outputs: 88
 130
 131 Network Stats
 132 -------------
 133
 134 total_msg_count_Control: 5190 41520
 135 total_msg_count_Data: 5178 372816
 136 total_msg_count_Response_Data: 5190 373680
 137 total_msg_count_Writeback_Control: 5178 41424
 138 total_msgs: 20736 total_bytes: 829440
 139
 140 switch_0_inlinks: 2
 141 switch_0_outlinks: 2
 142 links_utilized_percent_switch_0: 2.52117
 143   links_utilized_percent_switch_0_link_0: 2.5235 bw: 16000 base_latency: 1
 144   links_utilized_percent_switch_0_link_1: 2.51884 bw: 16000 base_latency: 1
 145
 146   outgoing_messages_switch_0_link_0_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1
 147   outgoing_messages_switch_0_link_0_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1
 148   outgoing_messages_switch_0_link_1_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1
 149   outgoing_messages_switch_0_link_1_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1
 150
 151 switch_1_inlinks: 2
 152 switch_1_outlinks: 2
 153 links_utilized_percent_switch_1: 2.52117
 154   links_utilized_percent_switch_1_link_0: 2.51884 bw: 16000 base_latency: 1
 155   links_utilized_percent_switch_1_link_1: 2.5235 bw: 16000 base_latency: 1
 156
 157   outgoing_messages_switch_1_link_0_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1
 158   outgoing_messages_switch_1_link_0_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1
 159   outgoing_messages_switch_1_link_1_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1
 160   outgoing_messages_switch_1_link_1_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1
 161
 162 switch_2_inlinks: 2
 163 switch_2_outlinks: 2
 164 links_utilized_percent_switch_2: 2.52117
 165   links_utilized_percent_switch_2_link_0: 2.5235 bw: 16000 base_latency: 1
 166   links_utilized_percent_switch_2_link_1: 2.51884 bw: 16000 base_latency: 1
 167
 168   outgoing_messages_switch_2_link_0_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1
 169   outgoing_messages_switch_2_link_0_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1
 170   outgoing_messages_switch_2_link_1_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1
 171   outgoing_messages_switch_2_link_1_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1
 172
 173 Cache Stats: system.l1_cntrl0.cacheMemory
 174   system.l1_cntrl0.cacheMemory_total_misses: 1730
 175   system.l1_cntrl0.cacheMemory_total_demand_misses: 1730
 176   system.l1_cntrl0.cacheMemory_total_prefetches: 0
 177   system.l1_cntrl0.cacheMemory_total_sw_prefetches: 0
 178   system.l1_cntrl0.cacheMemory_total_hw_prefetches: 0
 179
 180   system.l1_cntrl0.cacheMemory_request_type_LD:   42.0231%
 181   system.l1_cntrl0.cacheMemory_request_type_ST:   15.7803%
 182   system.l1_cntrl0.cacheMemory_request_type_IFETCH:   42.1965%
 183
 184   system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor:   1730    100%
 185
 186  --- L1Cache ---
 187  - Event Counts -
 188 Load [1185 ] 1185
 189 Ifetch [6414 ] 6414
 190 Store [865 ] 865
 191 Data [1730 ] 1730
 192 Fwd_GETX [0 ] 0
 193 Inv [0 ] 0
 194 Replacement [1726 ] 1726
 195 Writeback_Ack [1726 ] 1726
 196 Writeback_Nack [0 ] 0
 197
 198  - Transitions -
 199 I  Load [727 ] 727
 200 I  Ifetch [730 ] 730
 201 I  Store [273 ] 273
 202 I  Inv [0 ] 0
 203 I  Replacement [0 ] 0
 204
 205 II  Writeback_Nack [0 ] 0
 206
 207 M  Load [458 ] 458
 208 M  Ifetch [5684 ] 5684
 209 M  Store [592 ] 592
 210 M  Fwd_GETX [0 ] 0
 211 M  Inv [0 ] 0
 212 M  Replacement [1726 ] 1726
 213
 214 MI  Fwd_GETX [0 ] 0
 215 MI  Inv [0 ] 0
 216 MI  Writeback_Ack [1726 ] 1726
 217 MI  Writeback_Nack [0 ] 0
 218
 219 MII  Fwd_GETX [0 ] 0
 220
 221 IS  Data [1457 ] 1457
 222
 223 IM  Data [273 ] 273
 224
 225 Memory controller: system.dir_cntrl0.memBuffer:
 226   memory_total_requests: 3456
 227   memory_reads: 1730
 228   memory_writes: 1726
 229   memory_refreshes: 714
 230   memory_total_request_delays: 4411
 231   memory_delays_per_request: 1.27633
 232   memory_delays_in_input_queue: 1083
 233   memory_delays_behind_head_of_bank_queue: 8
 234   memory_delays_stalled_at_head_of_bank_queue: 3320
 235   memory_stalls_for_bank_busy: 1509
 236   memory_stalls_for_random_busy: 0
 237   memory_stalls_for_anti_starvation: 0
 238   memory_stalls_for_arbitration: 99
 239   memory_stalls_for_bus: 1677
 240   memory_stalls_for_tfaw: 0
 241   memory_stalls_for_read_write_turnaround: 35
 242   memory_stalls_for_read_read_turnaround: 0
 243   accesses_per_bank: 162  36  92  110  106  362  98  36  32  34  83  92  110  104  84  86  83  53  50  58  64  124  212  72  66  50  122  190  220  325  42  98
 244
 245  --- Directory ---
 246  - Event Counts -
 247 GETX [1730 ] 1730
 248 GETS [0 ] 0
 249 PUTX [1726 ] 1726
 250 PUTX_NotOwner [0 ] 0
 251 DMA_READ [0 ] 0
 252 DMA_WRITE [0 ] 0
 253 Memory_Data [1730 ] 1730
 254 Memory_Ack [1726 ] 1726
 255
 256  - Transitions -
 257 I  GETX [1730 ] 1730
 258 I  PUTX_NotOwner [0 ] 0
 259 I  DMA_READ [0 ] 0
 260 I  DMA_WRITE [0 ] 0
 261
 262 M  GETX [0 ] 0
 263 M  PUTX [1726 ] 1726
 264 M  PUTX_NotOwner [0 ] 0
 265 M  DMA_READ [0 ] 0
 266 M  DMA_WRITE [0 ] 0
 267
 268 M_DRD  GETX [0 ] 0
 269 M_DRD  PUTX [0 ] 0
 270
 271 M_DWR  GETX [0 ] 0
 272 M_DWR  PUTX [0 ] 0
 273
 274 M_DWRI  GETX [0 ] 0
 275 M_DWRI  Memory_Ack [0 ] 0
 276
 277 M_DRDI  GETX [0 ] 0
 278 M_DRDI  Memory_Ack [0 ] 0
 279
 280 IM  GETX [0 ] 0
 281 IM  GETS [0 ] 0
 282 IM  PUTX [0 ] 0
 283 IM  PUTX_NotOwner [0 ] 0
 284 IM  DMA_READ [0 ] 0
 285 IM  DMA_WRITE [0 ] 0
 286 IM  Memory_Data [1730 ] 1730
 287
 288 MI  GETX [0 ] 0
 289 MI  GETS [0 ] 0
 290 MI  PUTX [0 ] 0
 291 MI  PUTX_NotOwner [0 ] 0
 292 MI  DMA_READ [0 ] 0
 293 MI  DMA_WRITE [0 ] 0
 294 MI  Memory_Ack [1726 ] 1726
 295
 296 ID  GETX [0 ] 0
 297 ID  GETS [0 ] 0
 298 ID  PUTX [0 ] 0
 299 ID  PUTX_NotOwner [0 ] 0
 300 ID  DMA_READ [0 ] 0
 301 ID  DMA_WRITE [0 ] 0
 302 ID  Memory_Data [0 ] 0
 303
 304 ID_W  GETX [0 ] 0
 305 ID_W  GETS [0 ] 0
 306 ID_W  PUTX [0 ] 0
 307 ID_W  PUTX_NotOwner [0 ] 0
 308 ID_W  DMA_READ [0 ] 0
 309 ID_W  DMA_WRITE [0 ] 0
 310 ID_W  Memory_Ack [0 ] 0
 311