2020-05-01 |
Daniel R. Carvalho | mem-cache: Fix DCPT with CircularQueue |
tree | commitdiff |
2020-05-01 |
Hsuan Hsu | cpu: Don't assert on branch target addresses |
tree | commitdiff |
2020-04-30 |
Gabe Black | python: Fix compareVersions for python 3. |
tree | commitdiff |
2020-04-30 |
Daniel R. Carvalho | mem-cache: Fix priority of multi compressor |
tree | commitdiff |
2020-04-30 |
Matthew Poremba | mem: Token port implementation |
tree | commitdiff |
2020-04-30 |
Tony Gutierrez | dev-hsa: Add HSA device and HSA packet processor |
tree | commitdiff |
2020-04-30 |
Tony Gutierrez | arch-gcn3: Add files for arch gcn3 (GPU machine ISA) |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | sim: Inheritance fixes in varargs |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | mem-ruby: Avoid const from member due to &Message:... |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | arch-arm: Fix access modifier in Arm*ProcessBits class |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | arch-arm: Fix inconsistency in variable name |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | mem-ruby: Removed the unused parameter m_id from Virtua... |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | arch-arm: Fix function signature inconsistencies in... |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | sim: Fix mismatch between #ifndef and #define in varargs.hh |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | arch-arm, mem-ruby, sim: Add missing overrides |
tree | commitdiff |
2020-04-30 |
Nikos Nikoleris | arch-arm: Downgrade constexpr causing build errors... |
tree | commitdiff |
2020-04-30 |
Gabe Black | sim: Add an option to suppress the return value in... |
tree | commitdiff |
2020-04-29 |
Gabe Black | misc: Use the protobuf version to choose between ByteSi... |
tree | commitdiff |
2020-04-29 |
Anouk Van Laer | sim-power: Addition of PowerDomains |
tree | commitdiff |
2020-04-29 |
Anouk Van Laer | sim-power: Specify the states a PowerState object can... |
tree | commitdiff |
2020-04-29 |
Anouk Van Laer | sim-power: Creation of PowerState class |
tree | commitdiff |
2020-04-29 |
Nikos Nikoleris | sim-power: Fix the way the power model accesses stats |
tree | commitdiff |
2020-04-29 |
Nikos Nikoleris | base, python, sim: Add support for resoving a stat... |
tree | commitdiff |
2020-04-29 |
Nikos Nikoleris | base: Add support for resolving stats within groups... |
tree | commitdiff |
2020-04-29 |
Nikos Nikoleris | sim: Add function that returns all variables in a MathExpr |
tree | commitdiff |
2020-04-29 |
Ciro Santilli | mem: make MemTest panic on a packet error |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: report that we don't have debugging support. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: respect IALIGN, influenced by toggling... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: let FPU instructions fault if status.FS... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: make uret,sret,mret SerializeAfter,NonSpecu... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: make accesses to CSRs SerializeAfter. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: fault according to status.{TVM,TSK,TW}. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: added dummy implementation of wfi instruction. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: fault on mstatus accesses from lower privil... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: ignore writes to SXL/UXL fields in status... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: added (un)serialization of miscRegFile. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: show names of MiscRegs on accesses. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: fixed read of {M,S,U}TVEC. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | cpu,configs: let RISC-V use the PT walker cache. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: fixed formatting. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: implement RemoteGDB::acc for FS mode. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: implement sfence.vma to flush TLBs. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: make sure only supported modes can be set... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: added TLB and page table walker. |
tree | commitdiff |
2020-04-29 |
Gabe Black | arm: Add a unit test for some aspects of the aapcs64... |
tree | commitdiff |
2020-04-28 |
Gabe Black | arm: Fix some bugs in the aapcs64 implementation. |
tree | commitdiff |
2020-04-28 |
Jordi Vaquero | arch-arm: Fix clasta/b and lasta/b simd&fp instructions |
tree | commitdiff |
2020-04-28 |
Giacomo Travaglini | sim, arch-arm: Restore capability of running without... |
tree | commitdiff |
2020-04-28 |
Gabe Black | sim,misc: Rename M5OP_ANNOTATE to M5OP_RESERVED1. |
tree | commitdiff |
2020-04-28 |
Gabe Black | util: Further simplify the initParam implementation. |
tree | commitdiff |
2020-04-27 |
Gabe Black | misc: Replace a deprecated method in protoio.cc. |
tree | commitdiff |
2020-04-27 |
Gabe Black | sim: Simplify collecting the key value in initParam. |
tree | commitdiff |
2020-04-27 |
Jordi Vaquero | arch-arm: Fix Sve Fcmla indexed instruction |
tree | commitdiff |
2020-04-27 |
Giacomo Travaglini | arch-arm: SVE instructions do not use AHP format |
tree | commitdiff |
2020-04-27 |
Giacomo Travaglini | arch-arm: Do not increment exponent if FPSCR.FZ in... |
tree | commitdiff |
2020-04-25 |
Bobby R. Bruce | misc: Removed unneeded Doxygen pages |
tree | commitdiff |
2020-04-23 |
Jordi Vaquero | arch: Fix VecReg container alignement to 128bits view |
tree | commitdiff |
2020-04-23 |
Mahyar Samani | arch-x86: Add hsub instructions to x86 |
tree | commitdiff |
2020-04-23 |
Tiago Muck | mem-ruby: Fix Ruby handling of functional requests |
tree | commitdiff |
2020-04-23 |
Tiago Muck | mem-ruby: SimpleNetwork implementation of functional... |
tree | commitdiff |
2020-04-23 |
Tiago Muck | mem-ruby: Add functionalReadBuffers to AbstractController |
tree | commitdiff |
2020-04-23 |
Tiago Muck | mem-ruby: Allow MessageBuffer functional reads |
tree | commitdiff |
2020-04-22 |
Bobby R. Bruce | base,misc: Added version to code |
tree | commitdiff |
2020-04-22 |
Gabe Black | base,arch,sim,cpu: Move object file loader components... |
tree | commitdiff |
2020-04-22 |
Gabe Black | configs,arch,sim: Move fixFuncEventAddr into the Worklo... |
tree | commitdiff |
2020-04-22 |
Gabe Black | arch,sim,kern,dev,cpu: Create a Workload SimObject. |
tree | commitdiff |
2020-04-20 |
Gabe Black | dev,cpu: Make two very generic enums ScopedEnums. |
tree | commitdiff |
2020-04-20 |
Gabe Black | mem: Rename the ruby Prefetcher class RubyPrefetcher. |
tree | commitdiff |
2020-04-20 |
Gabe Black | fastmodel: Enable semihosting, including pseudo insts. |
tree | commitdiff |
2020-04-19 |
Giacomo Travaglini | arch-sparc: MAP_32BIT does not exist on solaris |
tree | commitdiff |
2020-04-17 |
Matthew Poremba | sim: Use off_t for mmap offset arguments |
tree | commitdiff |
2020-04-17 |
Daniel R. Carvalho | mem-cache: Create Prefetcher namespace |
tree | commitdiff |
2020-04-17 |
Ciro Santilli | sim-se: add missing path redirection to mmap createObje... |
tree | commitdiff |
2020-04-16 |
Gabe Black | sparc,configs: Initialize ROMs directly, not with the... |
tree | commitdiff |
2020-04-16 |
Gabe Black | mem: Support initializing a memory with an image file. |
tree | commitdiff |
2020-04-15 |
Matthew Poremba | arch-x86: Change insertBits in TLB translateFunctional |
tree | commitdiff |
2020-04-15 |
Giacomo Travaglini | arch-arm: Override ISA::takeOverFrom for the Arm ISA |
tree | commitdiff |
2020-04-15 |
Giacomo Travaglini | arch, cpu: Add a takeOverFrom method for switching... |
tree | commitdiff |
2020-04-15 |
Giacomo Travaglini | arch-arm: Remove unnecessary haveGICv3CPUInterface |
tree | commitdiff |
2020-04-14 |
Giacomo Travaglini | dev-arm: Fix checkpointing for the GenericTimer |
tree | commitdiff |
2020-04-14 |
Giacomo Travaglini | arch-arm: Handle empty object_file scenario in ArmFsWor... |
tree | commitdiff |
2020-04-09 |
Matthew Poremba | arch-x86: Do not fixup faults in TLB |
tree | commitdiff |
2020-04-09 |
Wendy Elsasser | mem: Modify DRAM controller for flexibility and new... |
tree | commitdiff |
2020-04-09 |
Adrian Herrera | dev-arm: Add VExpress_GEM5_Foundation platform |
tree | commitdiff |
2020-04-08 |
Matt Poremba | mem-ruby: Replace SLICC queueMemory calls with enqueue |
tree | commitdiff |
2020-04-08 |
Adrian Herrera | arch-arm, dev-arm: Autogen PSCI node in DTB |
tree | commitdiff |
2020-04-06 |
Giacomo Travaglini | arch-arm: CNTHCTL trap to EL2 only if ARMv8.6-ECV imple... |
tree | commitdiff |
2020-04-03 |
Daniel R. Carvalho | base: Fix undefined behavior in mask generation |
tree | commitdiff |
2020-04-03 |
Matthew Poremba | base,arch-hsail: Fix GPU build |
tree | commitdiff |
2020-04-02 |
Gabe Black | scons: Fix an exception in the DictImporter on scons... |
tree | commitdiff |
2020-04-02 |
Nikos Nikoleris | arch-arm: Add missing include in QARMA implementation |
tree | commitdiff |
2020-03-31 |
Adrian Herrera | arch-arm, dev-arm: WakeRequest implementation |
tree | commitdiff |
2020-03-30 |
Gabe Black | mem: Get rid of the now unused SecurePortProxy class. |
tree | commitdiff |
2020-03-30 |
Gabe Black | arm: Make semihosting use virtual addresses. |
tree | commitdiff |
2020-03-30 |
Adrian Herrera | dev-arm: Adjust idreg value in RealViewCtrl |
tree | commitdiff |
2020-03-30 |
Giacomo Travaglini | dev-arm: Fix pci_mem_base setting in VExpress_GEM5_Base |
tree | commitdiff |
2020-03-30 |
Jordi Vaquero | arch-arm: ARMv8.3 CompNum, SIMD complex number support |
tree | commitdiff |
2020-03-27 |
Gabe Black | arm: Add a callSemihosting method that figures out... |
tree | commitdiff |
2020-03-27 |
Gabe Black | arm: Add a gem5 specific pseudo op semihosting call. |
tree | commitdiff |
2020-03-27 |
Gabe Black | riscv: Fix RISCV builds by updating its use of pseudoIn... |
tree | commitdiff |
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