lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  19    - EUR 250
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  21    - EUR 1250
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  31  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  35    - EUR
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  40  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  41  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  44    - shared with cole
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  46    - EUR 50, shared with samuel 10%
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  51    - EUR 50, shared with samuel (EUR 350)
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  57    - EUR 200
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  60    - donated
  61    - parent #198
  62    - EUR 200
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  64   - MultiCompUnit (and Function Units) proof
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  66   - donated
  67   - parent #195
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  69
  70 ## Completed but not yet submitted:
  71
  72 TO SORT
  73
  74  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
  75    - EUR 1600
  76    - EUR 800 shared with [[klehman]]
  77    - EUR 800 shared with [[lkcl]]
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  79    - EUR 800
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  82  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  84    - EUR 500
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  89  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  90
  91
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  93    - EUR 150
  94    - donated
  95  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
  96    - EUR 200
  97    - donated
  98  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
  99    - EUR 150
 100    - donated
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 102    - EUR 200
 103    - donated
 104  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 105    - EUR 700
 106    - (lip6.fr donated)
 107  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 108    - (total EUR 400 25% donated by LIP6)
 109    - EUR 100 lkcl
 110  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 111    - EUR 900
 112    - shared with [[lxo]]
 113  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 114    - EUR 1100
 115    - shared with lauri, jacob
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 117    - EUR 1250
 118    - Shared 50% with Staf
 119  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 120    - EUR 300
 121    - Shared with Staf, cole
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 123    - EUR 450
 124    - Shared with Staf
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 126  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 127    - Project 2019-10-043 06dec2020 wishbone
 128    - EUR (TBD)
 129
 130 ### Project 2019-10-029 14mar2020 coriolis2
 131
 132  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 133    - (total EUR 100 shared 50% with staf)
 134    - EUR 50 lkcl
 135  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 136    - (total EUR 1500 shared 50% with LIP6)
 137    - EUR 750 lkcl
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 139    - (total EUR 400 shared 75% with LIP6)
 140    - EUR 300 lkcl
 141
 142 ### Project 2019-02-012 06dec2020 Core
 143
 144  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 145    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 146  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 147    - EUR 750 donated
 148  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 149    - EUR 1500
 150
 151 ### Project 2019-10-043 06dec2020 wishbone
 152
 153  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 154    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 155  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 156    - EUR 200
 157  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 158    - EUR 100
 159  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 160    - EUR 200
 161  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 162    - EUR 100
 163  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 164    - EUR 200
 165  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 166    - EUR 450
 167  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 168    - EUR 100
 169  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 170    - EUR 200 donated
 171  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 172    - EUR 250 (share with cole)
 173
 174 ### Project 2019-10-032 06dec2020 proofs
 175
 176  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 177    - parent #195
 178    - EUR 400 donated
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 180    - parent #195
 181    - EUR 300 donated
 182  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 183    - EUR 400 donated
 184    - parent #195
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 186    - EUR 400 donated
 187    - parent #195
 188
 189 ## Submitted for NLNet RFP
 190
 191 submitted 2021-dec-09 but not confirmed paid
 192
 193  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 194    - EUR 300
 195  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 196    - EUR 250
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 198  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 200    - EUR 800 shared between:
 201    - EUR 500 [[lkcl]]
 202    - EUR 300 [[tplaten]]
 203  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 204    - EUR 5500 shared between:
 205    - EUR 3850 lkcl
 206    - EUR 1650 Others
 207  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 208    - EUR 1600
 209  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 210    - EUR 600
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 212    - EUR 500 shared between:
 213    - EUR 100 [[lkcl]]
 214    - EUR 325 dmitry
 215    - EUR 75 maciej
 216  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 217
 218
 219 ### Project 2019-02-012 04sep2020 Core
 220
 221  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 222    - EUR 2000 total, shared with florent.  EUR 1200
 223
 224 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 225
 226 ## Paid
 227
 228 donation from NLNet confirmed received:
 229
 230 ### coriolis2 2021-apr-04
 231
 232  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 233    - EUR 3000
 234    - shared with Staf 50%
 235
 236 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 237
 238  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 239     - EUR 2000, python POWER9 simulator
 240     - Shared 50% with [[mnolan]], EUR 1000
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 242     - EUR 250, functions needed for simulator
 243     - Shared 20% with [[mnolan]], EUR 50
 244
 245 ### proofs 2019-10-032
 246
 247  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 248    - EUR 500 shared 20% samuel, EUR 100
 249  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 250    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 251  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 252    - EUR 400 shared 25% [[mnolan]] EUR 100
 253  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 254    - EUR 150
 255
 256 ### wishbone 2019-10-043
 257
 258  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 259    - EUR 500
 260  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 261     - EUR 300
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 263     - EUR 250
 264  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 265    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 267    - EUR 300
 268  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 269    - EUR 400, 50% shared [[programmerjake]] EUR 200
 270  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 271    - EUR 750, 33% shared [[programmerjake]] EUR 250
 272  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 273    - EUR 200 50% shared, cole, EUR 100
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 275    - EUR 200
 276  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 277    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 278  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 279    - EUR 150
 280  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 281    - EUR 400 shared 50% [[mnolan]] EUR 200
 282  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 283    - EUR 250 shared 40% [[mnolan]] EUR 100
 284  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 285    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 286  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 287    - EUR 300 shared 50% [[mnolan]] EUR 150
 288  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 289    - EUR 750
 290  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 291   - EUR 100
 292  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 293   - EUR 100
 294  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 295    - EUR 100
 296  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 297    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 298
 299 ### Project 2019-02-012 28-apr-2020
 300
 301  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 302    - 6600 scoreboard multi-read/write
 303    - EUR 600
 304  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 305    - Partitioned equals and greater than comparison
 306    - Shared 50% with [[mnolan]]
 307    - EUR 200 (each)
 308  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 309    - partitioned scalar/vector shift
 310    - Shared 50% with [[lkcl]]
 311    - EUR 350 (each)
 312
 313 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 314
 315  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 316     - auto-parser of POWER9
 317     - Shared 50% with [[mnolan]]
 318     - EUR 500 (each)
 319
 320 ### Project 2019-10-029 Date 14mar2020
 321
 322 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 323   - EUR 1200
 324
 325 ### Project 2019-02-012 Date 12mar2020
 326
 327 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 328 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 329 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 330 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 331
 332 ### Project 2019-02-012 Date 28jan2020
 333
 334 * admin tasks
 335 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 336