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[libreriscv.git] / nlnet_2021_3mdeb_cavatools.mdwn
1 # NLnet User-operated Grant Request for 3mdeb Power ISA Simulator
2
3 * 2021-08-071
4
5 ## Project name
6
7 Libre-SOC 3mdeb Cavatools: Power ISA Simulator
8
9 ## Website / wiki
10
11 <https://libre-soc.org/nlnet_2021_3mdeb_cavatools>
12
13 Please be short and to the point in your answers; focus primarily on
14 the what and how, not so much on the why. Add longer descriptions as
15 attachments (see below). If English isn't your first language, don't
16 worry - our reviewers don't care about spelling errors, only about
17 great ideas. We apologise for the inconvenience of having to submit in
18 English. On the up side, you can be as technical as you need to be (but
19 you don't have to). Do stay concrete. Use plain text in your reply only,
20 if you need any HTML to make your point please include this as attachment.
21
22 ## Abstract: Can you explain the whole project and its expected outcome(s).
23
24 Cavatools is currently a high performance user-operated simulator of
25 the RISC-V ISA. The primary objective of the project is to extend it to
26 implement the scalar Power ISA and the Libre-SOC Draft SVP64
27 Extensions. This will allow rapid prototyping of Extensions to the
28 Power ISA long before they reach silicon (which is very costly).
29 In turn this helps Libre-SOC to deliver on its commitment to provide
30 user-trustable processors for use in Internet routers, desktop,
31 smartphone and other user-operated devices where security and transparency
32 is expected.
33
34 # Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?
35
36 3mdeb is currently helping Libre-SOC with the (horribly slow,
37 easy-to-read, easy-to-use) Libre-SOC Power ISA Simulator which is 20,000 times
38 slower than cavatools. 3mdeb is also helping with ISA level unit tests in
39 Libre-SOC's code base that will be used to cross-validate a huge range of
40 Power ISA simulators and actual silicon implementations.
41
42 # Requested Amount
43
44 EUR $50,000.
45
46 # Explain what the requested budget will be used for?
47
48 * To create a compiler which takes Libre-SOC Machine-readable
49 Power ISA specification files and generate c code
50 * To extend cavatools to include support for the Scalar
51 parts of the Power ISA
52 * To then add support for Libre-SOC's Draft SVP64 Extensions
53 * To enhance it to include gdb "remote" machine interface
54 support
55 * To add Power ISA RADIX MMU emulation
56 * To extend cavatools to run a very basic linux
57 initramfs in-memory with basic serial console access
58 * To demonstrate running first a single core linux kernel
59 and later a SMP one, with busybox
60 * To use the exact same Specification c compiler to create
61 an "illegal instruction trap" emulator, integrated
62 into the linux kernel, for emulating Power ISA SIMD instructions
63 (extending the existing trap-and-emulate code already present
64 in ppc64 linux kernel source code)
65
66 # Does the project have other funding sources, both past and present?
67
68 Although there is NLnet funding for the Libre-SOC Simulator
69 (written in python) and associayed unit tests, cavatools, which is
70 written in c by Peter Hsu, does not have funding for the Power ISA
71 aditions. cavatools itself is a very new project.
72
73 # Compare your own project with existing or historical efforts.
74
75 Although there are quite a few Power ISA simulators, none of them
76 are up-to-date or are suited to high performance, like cavatools.
77 cavatools is multi-process and extremely fast, using relatively little
78 memory, where power-gem5, which has a different focus and has huge flexibility
79 and usefulness for research, uses vast amounts
80 of memory and is much slower. cavatools also has hardware-level cycle-accurate emulation which is extremely useful and important for analysing experimental
81 instructions, which is a feature that no other Power ISA Simulator has.
82 DolphinPC and pearpc are over 15 years old and were targetted at 32 bit
83 emulation of much older Power ISA processors. Libre-SOC's python-based
84 simulator only achieves aroubd 2,000 instructions per second on
85 high performance hardware whereas
86 cavatools achieves 200,000 instructions per second per processor
87 on modest hardware.
88 IBM's own Power ISA simulator is proprietary and, because it contains
89 confidential experimentation internal to IBM, may not be made public.
90
91 ## What are significant technical challenges you expect to solve during the project, if any?
92
93 This is at its heart a compiler project, which can be a challenging
94 area. However the language being implemented is quite small and limited,
95 so the project is relatively straightforward.
96
97 ## Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes?
98
99 The project will be developed entirely publicly and transparently,
100 using Libre-SOC Project Resources which are already set up for trustable
101 auditability and transparency. The mailing lists therefore are always
102 publicly available.
103
104 Online conferences and talks will be given as progress
105 is made, as well as working with Libre-SOC to send out development
106 reports and progress.
107
108 # Extra info to be submitted