(no commit message)
[libreriscv.git] / openpower / sv / bmask.py
1 def bmask(bm, RA, RB=None, zero=False, XLEN=64):
2 mask = RB if RB is not None else ((1<<XLEN)-1)
3 ra = RA & mask
4 mode1 = bm&1
5 a1 = ra if mode1 else ~ra
6 mode2 = (bm >> 1) & 0b11
7 if mode2 == 0: a2 = -ra
8 if mode2 == 1: a2 = ra-1
9 if mode2 == 2: a2 = ra+1
10 if mode2 == 3: a2 = ~(ra+1)
11 a1 = a1 & mask
12 a2 = a2 & mask
13 mode3 = (bm >> 3) & 0b11
14 if mode3 == 0: RS = a1 | a2
15 if mode3 == 1: RS = a1 & a2
16 if mode3 == 2: RS = a1 ^ a2
17 if mode3 == 3: RS = 0 # RESERVED
18 RS &= mask
19 if not zero:
20 # put back masked-out bits of RA
21 RS |= RA & ~mask
22 return RS
23
24 SBF = 0b01010 # set before first
25 SOF = 0b01001 # set only first
26 SIF = 0b10000 # set including first 10011 also works no idea why yet