who_we_are.mdwn

   1 ## We want to:
   2
   3  - give mass volume appliance manufacturers an alternative to expensive un-auditable chips.
   4  - maximize the degree of trust a customer can place in their processor.
   5
   6 ## We do this by
   7
   8  providing the customer the **freedom to study, modify, and redistribute** the full SoC source from HDL and boot loader to down to the VLSI.
   9
  10 ## Libre-SOC is currently targeting:
  11
  12  - chromebooks
  13  - smartphones
  14  - tablets
  15  - and industrial boards
  16
  17 ## Our First Product Will Be:
  18
  19 a (quad core, 800mhz, dual issue, GPU, VPU, [and later an ML inference core] ) SOC.
  20
  21 ## Why a Libre-SOC?
  22
  23 Its quite hard to guarantee that a performant processors (think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they [aren’t](https://meltdownattack.com).
  24
  25 There are entire [dissertations](http://www.kroening.com/diss/diss-kroe.pdf) dedicated to the subject matter of merely functionally verifying a pipeline (this doesn’t even consider out of order execution).
  26
  27 Given the fact that performant bug-free processors no longer exist, how can you trust your processor? The next best thing is to have access to a processor’s design files. Not only have access to them, you must have the freedom to study and improve them.
  28
  29 Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire Libre-SOC.
  30
  31 ## Benefits: Privacy, Safety-Critical, Peace of Mind...
  32 Our Libre-SOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html).
  33
  34 There is a very real need for reliable safety critical processors (think airplane, smart car, nuclear power plant, pacemaker...).
  35 Libre-SOC posits that it is impossible to trust a processor in a safety critical environment without both access
  36 to that processor's source and a cycle accurate HDL simulator that guarantees developers their code behaves as they
  37 expect. An ISA level simulator is no longer satisfactory.
  38
  39 Refer to this [IEEE article](https://ieeexplore.ieee.org/document/4519604) by Cyberphysical System expert Ed-Lee for more details.
  40
  41 ## Still Have Questions?
  42
  43 Read about the business and practical benefits of a Libre-SOC below.
  44
  45 [[why_a_libresoc]]
  46
  47 See our [[3d_gpu/mission_statement]]