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diff --git a/openpower/sv/sprs.mdwn b/openpower/sv/sprs.mdwn
index 78f6a61b939cd848068a06c894cfef423e6f60b7..243f7ebd4dd406f52564ac8df6394a94d799fe04 100644 (file)
--- a/openpower/sv/sprs.mdwn
+++ b/openpower/sv/sprs.mdwn
@@ -108,6 +108,22 @@ could be adversely affected.  SVP64 purely relies on Scalar instructions,
 so Scalar instructions (except the SVP64 Management ones and mtspr and
 mfspr) are 100% guaranteed to have zero impact on SVP64 state.
 
+**SVme REMAP area**
+
+Each bit of `SVSTATE.SVme` indicates whether the SVSHAPE (0-3) is active and to which register
+the REMAP applies.  The application goes by *assembler operand names* on a per-mnemonic
+basis.  Some instructions may have `RT` as a source and as a destination: REMAP applies
+**separately** to each use in this case.  Also for Load/Store with Update the Effective
+Address (stored in EA) also may be separately REMAPed from RA as a source operand.
+
+| bit|applies|register applied|
+|----|-------|----------------|
+| 46 | mi0 | source RA / FRA / BA / BFA / RT / FRT |
+| 45 | mi1 | source RB / FRB / BB|
+| 44 | mi2 | source RC / FRC / BC|
+| 43 | mo0 | result RT / FRT / BT / BF|
+| 42 | mo1 | result Effective Address (RA) / FRS / RS|
+
 **Max Vector Length (maxvl)** <a name="mvl" />
 
 MAXVECTORLENGTH is a static (immediate-operand only) compile-time declaration