amdgpu/addrlib: Add flag to report if a surface can have dcc ram
[mesa.git] / src / amd / addrlib / addrinterface.h
1 /*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ****************************************************************************************************
29 * @file addrinterface.h
30 * @brief Contains the addrlib interfaces declaration and parameter defines
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_INTERFACE_H__
34 #define __ADDR_INTERFACE_H__
35
36 #include "addrtypes.h"
37
38 #if defined(__cplusplus)
39 extern "C"
40 {
41 #endif
42
43 #define ADDRLIB_VERSION_MAJOR 5
44 #define ADDRLIB_VERSION_MINOR 25
45 #define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR)
46
47 /// Virtually all interface functions need ADDR_HANDLE as first parameter
48 typedef VOID* ADDR_HANDLE;
49
50 /// Client handle used in callbacks
51 typedef VOID* ADDR_CLIENT_HANDLE;
52
53 /**
54 * /////////////////////////////////////////////////////////////////////////////////////////////////
55 * // Callback functions
56 * /////////////////////////////////////////////////////////////////////////////////////////////////
57 * typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
58 * const ADDR_ALLOCSYSMEM_INPUT* pInput);
59 * typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
60 * VOID* pVirtAddr);
61 * typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
62 * const ADDR_DEBUGPRINT_INPUT* pInput);
63 *
64 * /////////////////////////////////////////////////////////////////////////////////////////////////
65 * // Create/Destroy/Config functions
66 * /////////////////////////////////////////////////////////////////////////////////////////////////
67 * AddrCreate()
68 * AddrDestroy()
69 *
70 * /////////////////////////////////////////////////////////////////////////////////////////////////
71 * // Surface functions
72 * /////////////////////////////////////////////////////////////////////////////////////////////////
73 * AddrComputeSurfaceInfo()
74 * AddrComputeSurfaceAddrFromCoord()
75 * AddrComputeSurfaceCoordFromAddr()
76 *
77 * /////////////////////////////////////////////////////////////////////////////////////////////////
78 * // HTile functions
79 * /////////////////////////////////////////////////////////////////////////////////////////////////
80 * AddrComputeHtileInfo()
81 * AddrComputeHtileAddrFromCoord()
82 * AddrComputeHtileCoordFromAddr()
83 *
84 * /////////////////////////////////////////////////////////////////////////////////////////////////
85 * // C-mask functions
86 * /////////////////////////////////////////////////////////////////////////////////////////////////
87 * AddrComputeCmaskInfo()
88 * AddrComputeCmaskAddrFromCoord()
89 * AddrComputeCmaskCoordFromAddr()
90 *
91 * /////////////////////////////////////////////////////////////////////////////////////////////////
92 * // F-mask functions
93 * /////////////////////////////////////////////////////////////////////////////////////////////////
94 * AddrComputeFmaskInfo()
95 * AddrComputeFmaskAddrFromCoord()
96 * AddrComputeFmaskCoordFromAddr()
97 *
98 * /////////////////////////////////////////////////////////////////////////////////////////////////
99 * // Element/Utility functions
100 * /////////////////////////////////////////////////////////////////////////////////////////////////
101 * ElemFlt32ToDepthPixel()
102 * ElemFlt32ToColorPixel()
103 * AddrExtractBankPipeSwizzle()
104 * AddrCombineBankPipeSwizzle()
105 * AddrComputeSliceSwizzle()
106 * AddrConvertTileInfoToHW()
107 * AddrConvertTileIndex()
108 * AddrConvertTileIndex1()
109 * AddrGetTileIndex()
110 * AddrComputeBaseSwizzle()
111 * AddrUseTileIndex()
112 * AddrUseCombinedSwizzle()
113 *
114 **/
115
116 ////////////////////////////////////////////////////////////////////////////////////////////////////
117 // Callback functions
118 ////////////////////////////////////////////////////////////////////////////////////////////////////
119
120 /**
121 ****************************************************************************************************
122 * @brief channel setting structure
123 ****************************************************************************************************
124 */
125 typedef union _ADDR_CHANNEL_SETTING
126 {
127 struct
128 {
129 UINT_8 valid : 1; ///< Indicate whehter this channel setting is valid
130 UINT_8 channel : 2; ///< 0 for x channel, 1 for y channel, 2 for z channel
131 UINT_8 index : 5; ///< Channel index
132 };
133 UINT_8 value; ///< Value
134 } ADDR_CHANNEL_SETTING;
135
136 /**
137 ****************************************************************************************************
138 * @brief address equation key structure
139 ****************************************************************************************************
140 */
141 typedef union _ADDR_EQUATION_KEY
142 {
143 struct
144 {
145 UINT_32 log2ElementBytes : 3; ///< Log2 of Bytes per pixel
146 UINT_32 tileMode : 5; ///< Tile mode
147 UINT_32 microTileType : 3; ///< Micro tile type
148 UINT_32 pipeConfig : 5; ///< pipe config
149 UINT_32 numBanks : 5; ///< Number of banks
150 UINT_32 bankWidth : 4; ///< Bank width
151 UINT_32 bankHeight : 4; ///< Bank height
152 UINT_32 macroAspectRatio : 3; ///< Macro tile aspect ratio
153 } fields;
154 UINT_32 value;
155 } ADDR_EQUATION_KEY;
156
157 /**
158 ****************************************************************************************************
159 * @brief address equation structure
160 ****************************************************************************************************
161 */
162 #define ADDR_MAX_EQUATION_BIT 20u
163
164 // Invalid equation index
165 #define ADDR_INVALID_EQUATION_INDEX 0xFFFFFFFF
166
167 typedef struct _ADDR_EQUATION
168 {
169 ADDR_CHANNEL_SETTING addr[ADDR_MAX_EQUATION_BIT]; ///< addr setting
170 ///< each bit is result of addr ^ xor ^ xor2
171 ADDR_CHANNEL_SETTING xor1[ADDR_MAX_EQUATION_BIT]; ///< xor setting
172 ADDR_CHANNEL_SETTING xor2[ADDR_MAX_EQUATION_BIT]; ///< xor2 setting
173 UINT_32 numBits; ///< The number of bits in equation
174 BOOL_32 stackedDepthSlices; ///< TRUE if depth slices are treated as being
175 ///< stacked vertically prior to swizzling
176 } ADDR_EQUATION;
177
178
179 /**
180 ****************************************************************************************************
181 * @brief Alloc system memory flags.
182 * @note These flags are reserved for future use and if flags are added will minimize the impact
183 * of the client.
184 ****************************************************************************************************
185 */
186 typedef union _ADDR_ALLOCSYSMEM_FLAGS
187 {
188 struct
189 {
190 UINT_32 reserved : 32; ///< Reserved for future use.
191 } fields;
192 UINT_32 value;
193
194 } ADDR_ALLOCSYSMEM_FLAGS;
195
196 /**
197 ****************************************************************************************************
198 * @brief Alloc system memory input structure
199 ****************************************************************************************************
200 */
201 typedef struct _ADDR_ALLOCSYSMEM_INPUT
202 {
203 UINT_32 size; ///< Size of this structure in bytes
204
205 ADDR_ALLOCSYSMEM_FLAGS flags; ///< System memory flags.
206 UINT_32 sizeInBytes; ///< System memory allocation size in bytes.
207 ADDR_CLIENT_HANDLE hClient; ///< Client handle
208 } ADDR_ALLOCSYSMEM_INPUT;
209
210 /**
211 ****************************************************************************************************
212 * ADDR_ALLOCSYSMEM
213 * @brief
214 * Allocate system memory callback function. Returns valid pointer on success.
215 ****************************************************************************************************
216 */
217 typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
218 const ADDR_ALLOCSYSMEM_INPUT* pInput);
219
220 /**
221 ****************************************************************************************************
222 * @brief Free system memory input structure
223 ****************************************************************************************************
224 */
225 typedef struct _ADDR_FREESYSMEM_INPUT
226 {
227 UINT_32 size; ///< Size of this structure in bytes
228
229 VOID* pVirtAddr; ///< Virtual address
230 ADDR_CLIENT_HANDLE hClient; ///< Client handle
231 } ADDR_FREESYSMEM_INPUT;
232
233 /**
234 ****************************************************************************************************
235 * ADDR_FREESYSMEM
236 * @brief
237 * Free system memory callback function.
238 * Returns ADDR_OK on success.
239 ****************************************************************************************************
240 */
241 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
242 const ADDR_FREESYSMEM_INPUT* pInput);
243
244 /**
245 ****************************************************************************************************
246 * @brief Print debug message input structure
247 ****************************************************************************************************
248 */
249 typedef struct _ADDR_DEBUGPRINT_INPUT
250 {
251 UINT_32 size; ///< Size of this structure in bytes
252
253 CHAR* pDebugString; ///< Debug print string
254 va_list ap; ///< Variable argument list
255 ADDR_CLIENT_HANDLE hClient; ///< Client handle
256 } ADDR_DEBUGPRINT_INPUT;
257
258 /**
259 ****************************************************************************************************
260 * ADDR_DEBUGPRINT
261 * @brief
262 * Print debug message callback function.
263 * Returns ADDR_OK on success.
264 ****************************************************************************************************
265 */
266 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
267 const ADDR_DEBUGPRINT_INPUT* pInput);
268
269 /**
270 ****************************************************************************************************
271 * ADDR_CALLBACKS
272 *
273 * @brief
274 * Address Library needs client to provide system memory alloc/free routines.
275 ****************************************************************************************************
276 */
277 typedef struct _ADDR_CALLBACKS
278 {
279 ADDR_ALLOCSYSMEM allocSysMem; ///< Routine to allocate system memory
280 ADDR_FREESYSMEM freeSysMem; ///< Routine to free system memory
281 ADDR_DEBUGPRINT debugPrint; ///< Routine to print debug message
282 } ADDR_CALLBACKS;
283
284 ////////////////////////////////////////////////////////////////////////////////////////////////////
285 // Create/Destroy functions
286 ////////////////////////////////////////////////////////////////////////////////////////////////////
287
288 /**
289 ****************************************************************************************************
290 * ADDR_CREATE_FLAGS
291 *
292 * @brief
293 * This structure is used to pass some setup in creation of AddrLib
294 * @note
295 ****************************************************************************************************
296 */
297 typedef union _ADDR_CREATE_FLAGS
298 {
299 struct
300 {
301 UINT_32 noCubeMipSlicesPad : 1; ///< Turn cubemap faces padding off
302 UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and
303 /// output structure
304 UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid
305 UINT_32 useCombinedSwizzle : 1; ///< Use combined tile swizzle
306 UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level
307 UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment
308 UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize
309 UINT_32 reserved : 25; ///< Reserved bits for future use
310 };
311
312 UINT_32 value;
313 } ADDR_CREATE_FLAGS;
314
315 /**
316 ****************************************************************************************************
317 * ADDR_REGISTER_VALUE
318 *
319 * @brief
320 * Data from registers to setup AddrLib global data, used in AddrCreate
321 ****************************************************************************************************
322 */
323 typedef struct _ADDR_REGISTER_VALUE
324 {
325 UINT_32 gbAddrConfig; ///< For R8xx, use GB_ADDR_CONFIG register value.
326 /// For R6xx/R7xx, use GB_TILING_CONFIG.
327 /// But they can be treated as the same.
328 /// if this value is 0, use chip to set default value
329 UINT_32 backendDisables; ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled.
330 /// Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE
331
332 /// R800 registers-----------------------------------------------
333 UINT_32 noOfBanks; ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK
334 /// No enums for this value in h/w header files
335 /// 0: 4
336 /// 1: 8
337 /// 2: 16
338 UINT_32 noOfRanks; /// MC_ARB_RAMCFG.NOOFRANK
339 /// 0: 1
340 /// 1: 2
341 /// SI (R1000) registers-----------------------------------------
342 const UINT_32* pTileConfig; ///< Global tile setting tables
343 UINT_32 noOfEntries; ///< Number of entries in pTileConfig
344
345 ///< CI registers-------------------------------------------------
346 const UINT_32* pMacroTileConfig; ///< Global macro tile mode table
347 UINT_32 noOfMacroEntries; ///< Number of entries in pMacroTileConfig
348 } ADDR_REGISTER_VALUE;
349
350 /**
351 ****************************************************************************************************
352 * ADDR_CREATE_INPUT
353 *
354 * @brief
355 * Parameters use to create an AddrLib Object. Caller must provide all fields.
356 *
357 ****************************************************************************************************
358 */
359 typedef struct _ADDR_CREATE_INPUT
360 {
361 UINT_32 size; ///< Size of this structure in bytes
362
363 UINT_32 chipEngine; ///< Chip Engine
364 UINT_32 chipFamily; ///< Chip Family
365 UINT_32 chipRevision; ///< Chip Revision
366 ADDR_CALLBACKS callbacks; ///< Callbacks for sysmem alloc/free/print
367 ADDR_CREATE_FLAGS createFlags; ///< Flags to setup AddrLib
368 ADDR_REGISTER_VALUE regValue; ///< Data from registers to setup AddrLib global data
369 ADDR_CLIENT_HANDLE hClient; ///< Client handle
370 UINT_32 minPitchAlignPixels; ///< Minimum pitch alignment in pixels
371 } ADDR_CREATE_INPUT;
372
373 /**
374 ****************************************************************************************************
375 * ADDR_CREATEINFO_OUTPUT
376 *
377 * @brief
378 * Return AddrLib handle to client driver
379 *
380 ****************************************************************************************************
381 */
382 typedef struct _ADDR_CREATE_OUTPUT
383 {
384 UINT_32 size; ///< Size of this structure in bytes
385
386 ADDR_HANDLE hLib; ///< Address lib handle
387
388 UINT_32 numEquations; ///< Number of equations in the table
389 const ADDR_EQUATION* pEquationTable; ///< Pointer to the equation table
390 } ADDR_CREATE_OUTPUT;
391
392 /**
393 ****************************************************************************************************
394 * AddrCreate
395 *
396 * @brief
397 * Create AddrLib object, must be called before any interface calls
398 *
399 * @return
400 * ADDR_OK if successful
401 ****************************************************************************************************
402 */
403 ADDR_E_RETURNCODE ADDR_API AddrCreate(
404 const ADDR_CREATE_INPUT* pAddrCreateIn,
405 ADDR_CREATE_OUTPUT* pAddrCreateOut);
406
407
408
409 /**
410 ****************************************************************************************************
411 * AddrDestroy
412 *
413 * @brief
414 * Destroy AddrLib object, must be called to free internally allocated resources.
415 *
416 * @return
417 * ADDR_OK if successful
418 ****************************************************************************************************
419 */
420 ADDR_E_RETURNCODE ADDR_API AddrDestroy(
421 ADDR_HANDLE hLib);
422
423
424
425 ////////////////////////////////////////////////////////////////////////////////////////////////////
426 // Surface functions
427 ////////////////////////////////////////////////////////////////////////////////////////////////////
428
429 /**
430 ****************************************************************************************************
431 * @brief
432 * Bank/tiling parameters. On function input, these can be set as desired or
433 * left 0 for AddrLib to calculate/default. On function output, these are the actual
434 * parameters used.
435 * @note
436 * Valid bankWidth/bankHeight value:
437 * 1,2,4,8. They are factors instead of pixels or bytes.
438 *
439 * The bank number remains constant across each row of the
440 * macro tile as each pipe is selected, so the number of
441 * tiles in the x direction with the same bank number will
442 * be bank_width * num_pipes.
443 ****************************************************************************************************
444 */
445 typedef struct _ADDR_TILEINFO
446 {
447 /// Any of these parameters can be set to 0 to use the HW default.
448 UINT_32 banks; ///< Number of banks, numerical value
449 UINT_32 bankWidth; ///< Number of tiles in the X direction in the same bank
450 UINT_32 bankHeight; ///< Number of tiles in the Y direction in the same bank
451 UINT_32 macroAspectRatio; ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1
452 UINT_32 tileSplitBytes; ///< Tile split size, in bytes
453 AddrPipeCfg pipeConfig; ///< Pipe Config = HW enum + 1
454 } ADDR_TILEINFO;
455
456 // Create a define to avoid client change. The removal of R800 is because we plan to implement SI
457 // within 800 HWL - An AddrPipeCfg is added in above data structure
458 typedef ADDR_TILEINFO ADDR_R800_TILEINFO;
459
460 /**
461 ****************************************************************************************************
462 * @brief
463 * Information needed by quad buffer stereo support
464 ****************************************************************************************************
465 */
466 typedef struct _ADDR_QBSTEREOINFO
467 {
468 UINT_32 eyeHeight; ///< Height (in pixel rows) to right eye
469 UINT_32 rightOffset; ///< Offset (in bytes) to right eye
470 UINT_32 rightSwizzle; ///< TileSwizzle for right eyes
471 } ADDR_QBSTEREOINFO;
472
473 /**
474 ****************************************************************************************************
475 * ADDR_SURFACE_FLAGS
476 *
477 * @brief
478 * Surface flags
479 ****************************************************************************************************
480 */
481 typedef union _ADDR_SURFACE_FLAGS
482 {
483 struct
484 {
485 UINT_32 color : 1; ///< Flag indicates this is a color buffer
486 UINT_32 depth : 1; ///< Flag indicates this is a depth/stencil buffer
487 UINT_32 stencil : 1; ///< Flag indicates this is a stencil buffer
488 UINT_32 texture : 1; ///< Flag indicates this is a texture
489 UINT_32 cube : 1; ///< Flag indicates this is a cubemap
490 UINT_32 volume : 1; ///< Flag indicates this is a volume texture
491 UINT_32 fmask : 1; ///< Flag indicates this is an fmask
492 UINT_32 cubeAsArray : 1; ///< Flag indicates if treat cubemap as arrays
493 UINT_32 compressZ : 1; ///< Flag indicates z buffer is compressed
494 UINT_32 overlay : 1; ///< Flag indicates this is an overlay surface
495 UINT_32 noStencil : 1; ///< Flag indicates this depth has no separate stencil
496 UINT_32 display : 1; ///< Flag indicates this should match display controller req.
497 UINT_32 opt4Space : 1; ///< Flag indicates this surface should be optimized for space
498 /// i.e. save some memory but may lose performance
499 UINT_32 prt : 1; ///< Flag for partially resident texture
500 UINT_32 qbStereo : 1; ///< Quad buffer stereo surface
501 UINT_32 pow2Pad : 1; ///< SI: Pad to pow2, must set for mipmap (include level0)
502 UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding
503 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
504 UINT_32 dispTileType : 1; ///< NI: force display Tiling for 128 bit shared resoruce
505 UINT_32 dccCompatible : 1; ///< VI: whether to support dcc fast clear
506 UINT_32 czDispCompatible : 1; ///< SI+: CZ family has a HW bug needs special alignment.
507 /// This flag indicates we need to follow the
508 /// alignment with CZ families or other ASICs under
509 /// PX configuration + CZ.
510 UINT_32 nonSplit : 1; ///< CI: depth texture should not be split
511 UINT_32 disableLinearOpt : 1; ///< Disable tile mode optimization to linear
512 UINT_32 needEquation : 1; ///< Make the surface tile setting equation compatible.
513 /// This flag indicates we need to override tile
514 /// mode to PRT_* tile mode to disable slice rotation,
515 /// which is needed by swizzle pattern equation.
516 UINT_32 skipIndicesOutput : 1; ///< Skipping indices in output.
517 UINT_32 rotateDisplay : 1; ///< Rotate micro tile type
518 UINT_32 reserved : 6; ///< Reserved bits
519 };
520
521 UINT_32 value;
522 } ADDR_SURFACE_FLAGS;
523
524 /**
525 ****************************************************************************************************
526 * ADDR_COMPUTE_SURFACE_INFO_INPUT
527 *
528 * @brief
529 * Input structure for AddrComputeSurfaceInfo
530 ****************************************************************************************************
531 */
532 typedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT
533 {
534 UINT_32 size; ///< Size of this structure in bytes
535
536 AddrTileMode tileMode; ///< Tile mode
537 AddrFormat format; ///< If format is set to valid one, bpp/width/height
538 /// might be overwritten
539 UINT_32 bpp; ///< Bits per pixel
540 UINT_32 numSamples; ///< Number of samples
541 UINT_32 width; ///< Width, in pixels
542 UINT_32 height; ///< Height, in pixels
543 UINT_32 numSlices; ///< Number of surface slices or depth
544 UINT_32 slice; ///< Slice index
545 UINT_32 mipLevel; ///< Current mipmap level
546 UINT_32 numMipLevels; ///< Number of mips in mip chain
547 ADDR_SURFACE_FLAGS flags; ///< Surface type flags
548 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
549 /// number of samples for normal AA; Set it to the
550 /// number of fragments for EQAA
551 /// r800 and later HWL parameters
552 // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's
553 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Set to 0 to default/calculate
554 AddrTileType tileType; ///< Micro tiling type, not needed when tileIndex != -1
555 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
556 /// while the global useTileIndex is set to 1
557 UINT_32 basePitch; ///< Base level pitch in pixels, 0 means ignored, is a
558 /// must for mip levels from SI+.
559 /// Don't use pitch in blocks for compressed formats!
560 } ADDR_COMPUTE_SURFACE_INFO_INPUT;
561
562 /**
563 ****************************************************************************************************
564 * ADDR_COMPUTE_SURFACE_INFO_OUTPUT
565 *
566 * @brief
567 * Output structure for AddrComputeSurfInfo
568 * @note
569 Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
570 Pixel: Original pixel
571 ****************************************************************************************************
572 */
573 typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT
574 {
575 UINT_32 size; ///< Size of this structure in bytes
576
577 UINT_32 pitch; ///< Pitch in elements (in blocks for compressed formats)
578 UINT_32 height; ///< Height in elements (in blocks for compressed formats)
579 UINT_32 depth; ///< Number of slice/depth
580 UINT_64 surfSize; ///< Surface size in bytes
581 AddrTileMode tileMode; ///< Actual tile mode. May differ from that in input
582 UINT_32 baseAlign; ///< Base address alignment
583 UINT_32 pitchAlign; ///< Pitch alignment, in elements
584 UINT_32 heightAlign; ///< Height alignment, in elements
585 UINT_32 depthAlign; ///< Depth alignment, aligned to thickness, for 3d texture
586 UINT_32 bpp; ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit)
587 UINT_32 pixelPitch; ///< Pitch in original pixels
588 UINT_32 pixelHeight; ///< Height in original pixels
589 UINT_32 pixelBits; ///< Original bits per pixel, passed from input
590 UINT_64 sliceSize; ///< Size of slice specified by input's slice
591 /// The result is controlled by surface flags & createFlags
592 /// By default this value equals to surfSize for volume
593 UINT_32 pitchTileMax; ///< PITCH_TILE_MAX value for h/w register
594 UINT_32 heightTileMax; ///< HEIGHT_TILE_MAX value for h/w register
595 UINT_32 sliceTileMax; ///< SLICE_TILE_MAX value for h/w register
596
597 UINT_32 numSamples; ///< Pass the effective numSamples processed in this call
598
599 /// r800 and later HWL parameters
600 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Filled in if 0 on input
601 AddrTileType tileType; ///< Micro tiling type, only valid when tileIndex != -1
602 INT_32 tileIndex; ///< Tile index, MAY be "downgraded"
603
604 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
605 /// Output flags
606 struct
607 {
608 /// Special information to work around SI mipmap swizzle bug UBTS #317508
609 UINT_32 last2DLevel : 1; ///< TRUE if this is the last 2D(3D) tiled
610 ///< Only meaningful when create flag checkLast2DLevel is set
611 UINT_32 tcCompatible : 1; ///< If the surface can be shader compatible
612 UINT_32 dccUnsupport : 1; ///< If the surface can support DCC compressed rendering
613 UINT_32 reserved :29; ///< Reserved bits
614 };
615
616 UINT_32 equationIndex; ///< Equation index in the equation table;
617
618 UINT_32 blockWidth; ///< Width in element inside one block(1D->Micro, 2D->Macro)
619 UINT_32 blockHeight; ///< Height in element inside one block(1D->Micro, 2D->Macro)
620 UINT_32 blockSlices; ///< Slice number inside one block(1D->Micro, 2D->Macro)
621
622 /// Stereo info
623 ADDR_QBSTEREOINFO* pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE
624 } ADDR_COMPUTE_SURFACE_INFO_OUTPUT;
625
626 /**
627 ****************************************************************************************************
628 * AddrComputeSurfaceInfo
629 *
630 * @brief
631 * Compute surface width/height/depth/alignments and suitable tiling mode
632 ****************************************************************************************************
633 */
634 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
635 ADDR_HANDLE hLib,
636 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
637 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut);
638
639
640
641 /**
642 ****************************************************************************************************
643 * ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
644 *
645 * @brief
646 * Input structure for AddrComputeSurfaceAddrFromCoord
647 ****************************************************************************************************
648 */
649 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
650 {
651 UINT_32 size; ///< Size of this structure in bytes
652
653 UINT_32 x; ///< X coordinate
654 UINT_32 y; ///< Y coordinate
655 UINT_32 slice; ///< Slice index
656 UINT_32 sample; ///< Sample index, use fragment index for EQAA
657
658 UINT_32 bpp; ///< Bits per pixel
659 UINT_32 pitch; ///< Surface pitch, in pixels
660 UINT_32 height; ///< Surface height, in pixels
661 UINT_32 numSlices; ///< Surface depth
662 UINT_32 numSamples; ///< Number of samples
663
664 AddrTileMode tileMode; ///< Tile mode
665 BOOL_32 isDepth; ///< TRUE if the surface uses depth sample ordering within
666 /// micro tile. Textures can also choose depth sample order
667 UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles
668 /// the case that components are stored separately
669 UINT_32 compBits; ///< The component bits actually needed(for planar surface)
670
671 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
672 /// number of samples for normal AA; Set it to the
673 /// number of fragments for EQAA
674 /// r800 and later HWL parameters
675 // Used for 1D tiling above
676 AddrTileType tileType; ///< See defintion of AddrTileType
677 struct
678 {
679 UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture
680 /// only flag. Only non-RT texture can set this to TRUE
681 UINT_32 reserved :31; ///< Reserved for future use.
682 };
683 // 2D tiling needs following structure
684 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
685 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
686 /// while the global useTileIndex is set to 1
687 union
688 {
689 struct
690 {
691 UINT_32 bankSwizzle; ///< Bank swizzle
692 UINT_32 pipeSwizzle; ///< Pipe swizzle
693 };
694 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
695 };
696
697 #if ADDR_AM_BUILD // These two fields are not valid in SW blt since no HTILE access
698 UINT_32 addr5Swizzle; ///< ADDR5_SWIZZLE_MASK of DB_DEPTH_INFO
699 BOOL_32 is32ByteTile; ///< Caller must have access to HTILE buffer and know if
700 /// this tile is compressed to 32B
701 #endif
702 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
703
704 /**
705 ****************************************************************************************************
706 * ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
707 *
708 * @brief
709 * Output structure for AddrComputeSurfaceAddrFromCoord
710 ****************************************************************************************************
711 */
712 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
713 {
714 UINT_32 size; ///< Size of this structure in bytes
715
716 UINT_64 addr; ///< Byte address
717 UINT_32 bitPosition; ///< Bit position within surfaceAddr, 0-7.
718 /// For surface bpp < 8, e.g. FMT_1.
719 UINT_32 prtBlockIndex; ///< Index of a PRT tile (64K block)
720 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
721
722 /**
723 ****************************************************************************************************
724 * AddrComputeSurfaceAddrFromCoord
725 *
726 * @brief
727 * Compute surface address from a given coordinate.
728 ****************************************************************************************************
729 */
730 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord(
731 ADDR_HANDLE hLib,
732 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
733 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut);
734
735
736
737 /**
738 ****************************************************************************************************
739 * ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
740 *
741 * @brief
742 * Input structure for AddrComputeSurfaceCoordFromAddr
743 ****************************************************************************************************
744 */
745 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
746 {
747 UINT_32 size; ///< Size of this structure in bytes
748
749 UINT_64 addr; ///< Address in bytes
750 UINT_32 bitPosition; ///< Bit position in addr. 0-7. for surface bpp < 8,
751 /// e.g. FMT_1;
752 UINT_32 bpp; ///< Bits per pixel
753 UINT_32 pitch; ///< Pitch, in pixels
754 UINT_32 height; ///< Height in pixels
755 UINT_32 numSlices; ///< Surface depth
756 UINT_32 numSamples; ///< Number of samples
757
758 AddrTileMode tileMode; ///< Tile mode
759 BOOL_32 isDepth; ///< Surface uses depth sample ordering within micro tile.
760 /// Note: Textures can choose depth sample order as well.
761 UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles
762 /// the case that components are stored separately
763 UINT_32 compBits; ///< The component bits actually needed(for planar surface)
764
765 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
766 /// number of samples for normal AA; Set it to the
767 /// number of fragments for EQAA
768 /// r800 and later HWL parameters
769 // Used for 1D tiling above
770 AddrTileType tileType; ///< See defintion of AddrTileType
771 struct
772 {
773 UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture
774 /// only flag. Only non-RT texture can set this to TRUE
775 UINT_32 reserved :31; ///< Reserved for future use.
776 };
777 // 2D tiling needs following structure
778 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
779 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
780 /// while the global useTileIndex is set to 1
781 union
782 {
783 struct
784 {
785 UINT_32 bankSwizzle; ///< Bank swizzle
786 UINT_32 pipeSwizzle; ///< Pipe swizzle
787 };
788 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
789 };
790 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
791
792 /**
793 ****************************************************************************************************
794 * ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
795 *
796 * @brief
797 * Output structure for AddrComputeSurfaceCoordFromAddr
798 ****************************************************************************************************
799 */
800 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
801 {
802 UINT_32 size; ///< Size of this structure in bytes
803
804 UINT_32 x; ///< X coordinate
805 UINT_32 y; ///< Y coordinate
806 UINT_32 slice; ///< Index of slices
807 UINT_32 sample; ///< Index of samples, means fragment index for EQAA
808 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
809
810 /**
811 ****************************************************************************************************
812 * AddrComputeSurfaceCoordFromAddr
813 *
814 * @brief
815 * Compute coordinate from a given surface address
816 ****************************************************************************************************
817 */
818 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr(
819 ADDR_HANDLE hLib,
820 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
821 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut);
822
823 ////////////////////////////////////////////////////////////////////////////////////////////////////
824 // HTile functions
825 ////////////////////////////////////////////////////////////////////////////////////////////////////
826
827 /**
828 ****************************************************************************************************
829 * ADDR_HTILE_FLAGS
830 *
831 * @brief
832 * HTILE flags
833 ****************************************************************************************************
834 */
835 typedef union _ADDR_HTILE_FLAGS
836 {
837 struct
838 {
839 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
840 UINT_32 reserved :31; ///< Reserved bits
841 };
842
843 UINT_32 value;
844 } ADDR_HTILE_FLAGS;
845
846 /**
847 ****************************************************************************************************
848 * ADDR_COMPUTE_HTILE_INFO_INPUT
849 *
850 * @brief
851 * Input structure of AddrComputeHtileInfo
852 ****************************************************************************************************
853 */
854 typedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT
855 {
856 UINT_32 size; ///< Size of this structure in bytes
857
858 ADDR_HTILE_FLAGS flags; ///< HTILE flags
859 UINT_32 pitch; ///< Surface pitch, in pixels
860 UINT_32 height; ///< Surface height, in pixels
861 UINT_32 numSlices; ///< Number of slices
862 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
863 AddrHtileBlockSize blockWidth; ///< 4 or 8. EG above only support 8
864 AddrHtileBlockSize blockHeight; ///< 4 or 8. EG above only support 8
865 ADDR_TILEINFO* pTileInfo; ///< Tile info
866
867 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
868 /// while the global useTileIndex is set to 1
869 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
870 ///< README: When tileIndex is not -1, this must be valid
871 } ADDR_COMPUTE_HTILE_INFO_INPUT;
872
873 /**
874 ****************************************************************************************************
875 * ADDR_COMPUTE_HTILE_INFO_OUTPUT
876 *
877 * @brief
878 * Output structure of AddrComputeHtileInfo
879 ****************************************************************************************************
880 */
881 typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT
882 {
883 UINT_32 size; ///< Size of this structure in bytes
884
885 UINT_32 pitch; ///< Pitch in pixels of depth buffer represented in this
886 /// HTile buffer. This might be larger than original depth
887 /// buffer pitch when called with an unaligned pitch.
888 UINT_32 height; ///< Height in pixels, as above
889 UINT_64 htileBytes; ///< Size of HTILE buffer, in bytes
890 UINT_32 baseAlign; ///< Base alignment
891 UINT_32 bpp; ///< Bits per pixel for HTILE is how many bits for an 8x8 block!
892 UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape
893 UINT_32 macroHeight; ///< Macro height in pixels
894 UINT_64 sliceSize; ///< Slice size, in bytes.
895 } ADDR_COMPUTE_HTILE_INFO_OUTPUT;
896
897 /**
898 ****************************************************************************************************
899 * AddrComputeHtileInfo
900 *
901 * @brief
902 * Compute Htile pitch, height, base alignment and size in bytes
903 ****************************************************************************************************
904 */
905 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo(
906 ADDR_HANDLE hLib,
907 const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
908 ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut);
909
910
911
912 /**
913 ****************************************************************************************************
914 * ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
915 *
916 * @brief
917 * Input structure for AddrComputeHtileAddrFromCoord
918 ****************************************************************************************************
919 */
920 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
921 {
922 UINT_32 size; ///< Size of this structure in bytes
923
924 UINT_32 pitch; ///< Pitch, in pixels
925 UINT_32 height; ///< Height in pixels
926 UINT_32 x; ///< X coordinate
927 UINT_32 y; ///< Y coordinate
928 UINT_32 slice; ///< Index of slice
929 UINT_32 numSlices; ///< Number of slices
930 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
931 ADDR_HTILE_FLAGS flags; ///< htile flags
932 AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
933 AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
934 ADDR_TILEINFO* pTileInfo; ///< Tile info
935
936 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
937 /// while the global useTileIndex is set to 1
938 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
939 ///< README: When tileIndex is not -1, this must be valid
940 UINT_32 bpp; ///< depth/stencil buffer bit per pixel size
941 UINT_32 zStencilAddr; ///< tcCompatible Z/Stencil surface address
942 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
943
944 /**
945 ****************************************************************************************************
946 * ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
947 *
948 * @brief
949 * Output structure for AddrComputeHtileAddrFromCoord
950 ****************************************************************************************************
951 */
952 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
953 {
954 UINT_32 size; ///< Size of this structure in bytes
955
956 UINT_64 addr; ///< Address in bytes
957 UINT_32 bitPosition; ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method.
958 /// So we keep bitPosition for HTILE as well
959 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
960
961 /**
962 ****************************************************************************************************
963 * AddrComputeHtileAddrFromCoord
964 *
965 * @brief
966 * Compute Htile address according to coordinates (of depth buffer)
967 ****************************************************************************************************
968 */
969 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord(
970 ADDR_HANDLE hLib,
971 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
972 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut);
973
974
975
976 /**
977 ****************************************************************************************************
978 * ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
979 *
980 * @brief
981 * Input structure for AddrComputeHtileCoordFromAddr
982 ****************************************************************************************************
983 */
984 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
985 {
986 UINT_32 size; ///< Size of this structure in bytes
987
988 UINT_64 addr; ///< Address
989 UINT_32 bitPosition; ///< Bit position 0 or 4. CMASK and HTILE share some methods
990 /// so we keep bitPosition for HTILE as well
991 UINT_32 pitch; ///< Pitch, in pixels
992 UINT_32 height; ///< Height, in pixels
993 UINT_32 numSlices; ///< Number of slices
994 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
995 AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
996 AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
997 ADDR_TILEINFO* pTileInfo; ///< Tile info
998
999 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1000 /// while the global useTileIndex is set to 1
1001 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1002 ///< README: When tileIndex is not -1, this must be valid
1003 } ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT;
1004
1005 /**
1006 ****************************************************************************************************
1007 * ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1008 *
1009 * @brief
1010 * Output structure for AddrComputeHtileCoordFromAddr
1011 ****************************************************************************************************
1012 */
1013 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1014 {
1015 UINT_32 size; ///< Size of this structure in bytes
1016
1017 UINT_32 x; ///< X coordinate
1018 UINT_32 y; ///< Y coordinate
1019 UINT_32 slice; ///< Slice index
1020 } ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
1021
1022 /**
1023 ****************************************************************************************************
1024 * AddrComputeHtileCoordFromAddr
1025 *
1026 * @brief
1027 * Compute coordinates within depth buffer (1st pixel of a micro tile) according to
1028 * Htile address
1029 ****************************************************************************************************
1030 */
1031 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
1032 ADDR_HANDLE hLib,
1033 const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
1034 ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
1035
1036
1037
1038 ////////////////////////////////////////////////////////////////////////////////////////////////////
1039 // C-mask functions
1040 ////////////////////////////////////////////////////////////////////////////////////////////////////
1041
1042 /**
1043 ****************************************************************************************************
1044 * ADDR_CMASK_FLAGS
1045 *
1046 * @brief
1047 * CMASK flags
1048 ****************************************************************************************************
1049 */
1050 typedef union _ADDR_CMASK_FLAGS
1051 {
1052 struct
1053 {
1054 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
1055 UINT_32 reserved :31; ///< Reserved bits
1056 };
1057
1058 UINT_32 value;
1059 } ADDR_CMASK_FLAGS;
1060
1061 /**
1062 ****************************************************************************************************
1063 * ADDR_COMPUTE_CMASK_INFO_INPUT
1064 *
1065 * @brief
1066 * Input structure of AddrComputeCmaskInfo
1067 ****************************************************************************************************
1068 */
1069 typedef struct _ADDR_COMPUTE_CMASKINFO_INPUT
1070 {
1071 UINT_32 size; ///< Size of this structure in bytes
1072
1073 ADDR_CMASK_FLAGS flags; ///< CMASK flags
1074 UINT_32 pitch; ///< Pitch, in pixels, of color buffer
1075 UINT_32 height; ///< Height, in pixels, of color buffer
1076 UINT_32 numSlices; ///< Number of slices, of color buffer
1077 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1078 ADDR_TILEINFO* pTileInfo; ///< Tile info
1079
1080 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1081 /// while the global useTileIndex is set to 1
1082 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1083 ///< README: When tileIndex is not -1, this must be valid
1084 } ADDR_COMPUTE_CMASK_INFO_INPUT;
1085
1086 /**
1087 ****************************************************************************************************
1088 * ADDR_COMPUTE_CMASK_INFO_OUTPUT
1089 *
1090 * @brief
1091 * Output structure of AddrComputeCmaskInfo
1092 ****************************************************************************************************
1093 */
1094 typedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT
1095 {
1096 UINT_32 size; ///< Size of this structure in bytes
1097
1098 UINT_32 pitch; ///< Pitch in pixels of color buffer which
1099 /// this Cmask matches. The size might be larger than
1100 /// original color buffer pitch when called with
1101 /// an unaligned pitch.
1102 UINT_32 height; ///< Height in pixels, as above
1103 UINT_64 cmaskBytes; ///< Size in bytes of CMask buffer
1104 UINT_32 baseAlign; ///< Base alignment
1105 UINT_32 blockMax; ///< Cmask block size. Need this to set CB_COLORn_MASK register
1106 UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape
1107 UINT_32 macroHeight; ///< Macro height in pixels
1108 UINT_64 sliceSize; ///< Slice size, in bytes.
1109 } ADDR_COMPUTE_CMASK_INFO_OUTPUT;
1110
1111 /**
1112 ****************************************************************************************************
1113 * AddrComputeCmaskInfo
1114 *
1115 * @brief
1116 * Compute Cmask pitch, height, base alignment and size in bytes from color buffer
1117 * info
1118 ****************************************************************************************************
1119 */
1120 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo(
1121 ADDR_HANDLE hLib,
1122 const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
1123 ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut);
1124
1125
1126
1127 /**
1128 ****************************************************************************************************
1129 * ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1130 *
1131 * @brief
1132 * Input structure for AddrComputeCmaskAddrFromCoord
1133 *
1134 ****************************************************************************************************
1135 */
1136 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1137 {
1138 UINT_32 size; ///< Size of this structure in bytes
1139 UINT_32 x; ///< X coordinate
1140 UINT_32 y; ///< Y coordinate
1141 UINT_64 fmaskAddr; ///< Fmask addr for tc compatible Cmask
1142 UINT_32 slice; ///< Slice index
1143 UINT_32 pitch; ///< Pitch in pixels, of color buffer
1144 UINT_32 height; ///< Height in pixels, of color buffer
1145 UINT_32 numSlices; ///< Number of slices
1146 UINT_32 bpp;
1147 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1148 ADDR_CMASK_FLAGS flags; ///< CMASK flags
1149 ADDR_TILEINFO* pTileInfo; ///< Tile info
1150
1151 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1152 ///< while the global useTileIndex is set to 1
1153 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1154 ///< README: When tileIndex is not -1, this must be valid
1155 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
1156
1157 /**
1158 ****************************************************************************************************
1159 * ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1160 *
1161 * @brief
1162 * Output structure for AddrComputeCmaskAddrFromCoord
1163 ****************************************************************************************************
1164 */
1165 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1166 {
1167 UINT_32 size; ///< Size of this structure in bytes
1168
1169 UINT_64 addr; ///< CMASK address in bytes
1170 UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1171 /// so the address may be located in bit 0 (0) or 4 (4)
1172 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
1173
1174 /**
1175 ****************************************************************************************************
1176 * AddrComputeCmaskAddrFromCoord
1177 *
1178 * @brief
1179 * Compute Cmask address according to coordinates (of MSAA color buffer)
1180 ****************************************************************************************************
1181 */
1182 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord(
1183 ADDR_HANDLE hLib,
1184 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
1185 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut);
1186
1187
1188
1189 /**
1190 ****************************************************************************************************
1191 * ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1192 *
1193 * @brief
1194 * Input structure for AddrComputeCmaskCoordFromAddr
1195 ****************************************************************************************************
1196 */
1197 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1198 {
1199 UINT_32 size; ///< Size of this structure in bytes
1200
1201 UINT_64 addr; ///< CMASK address in bytes
1202 UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1203 /// so the address may be located in bit 0 (0) or 4 (4)
1204 UINT_32 pitch; ///< Pitch, in pixels
1205 UINT_32 height; ///< Height in pixels
1206 UINT_32 numSlices; ///< Number of slices
1207 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1208 ADDR_TILEINFO* pTileInfo; ///< Tile info
1209
1210 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1211 /// while the global useTileIndex is set to 1
1212 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1213 ///< README: When tileIndex is not -1, this must be valid
1214 } ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT;
1215
1216 /**
1217 ****************************************************************************************************
1218 * ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1219 *
1220 * @brief
1221 * Output structure for AddrComputeCmaskCoordFromAddr
1222 ****************************************************************************************************
1223 */
1224 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1225 {
1226 UINT_32 size; ///< Size of this structure in bytes
1227
1228 UINT_32 x; ///< X coordinate
1229 UINT_32 y; ///< Y coordinate
1230 UINT_32 slice; ///< Slice index
1231 } ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
1232
1233 /**
1234 ****************************************************************************************************
1235 * AddrComputeCmaskCoordFromAddr
1236 *
1237 * @brief
1238 * Compute coordinates within color buffer (1st pixel of a micro tile) according to
1239 * Cmask address
1240 ****************************************************************************************************
1241 */
1242 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
1243 ADDR_HANDLE hLib,
1244 const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
1245 ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut);
1246
1247
1248
1249 ////////////////////////////////////////////////////////////////////////////////////////////////////
1250 // F-mask functions
1251 ////////////////////////////////////////////////////////////////////////////////////////////////////
1252
1253 /**
1254 ****************************************************************************************************
1255 * ADDR_COMPUTE_FMASK_INFO_INPUT
1256 *
1257 * @brief
1258 * Input structure for AddrComputeFmaskInfo
1259 ****************************************************************************************************
1260 */
1261 typedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT
1262 {
1263 UINT_32 size; ///< Size of this structure in bytes
1264
1265 AddrTileMode tileMode; ///< Tile mode
1266 UINT_32 pitch; ///< Surface pitch, in pixels
1267 UINT_32 height; ///< Surface height, in pixels
1268 UINT_32 numSlices; ///< Number of slice/depth
1269 UINT_32 numSamples; ///< Number of samples
1270 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
1271 /// number of samples for normal AA; Set it to the
1272 /// number of fragments for EQAA
1273 /// r800 and later HWL parameters
1274 struct
1275 {
1276 UINT_32 resolved: 1; ///< TRUE if the surface is for resolved fmask, only used
1277 /// by H/W clients. S/W should always set it to FALSE.
1278 UINT_32 reserved: 31; ///< Reserved for future use.
1279 };
1280 ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Clients must give valid data
1281 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1282 /// while the global useTileIndex is set to 1
1283 } ADDR_COMPUTE_FMASK_INFO_INPUT;
1284
1285 /**
1286 ****************************************************************************************************
1287 * ADDR_COMPUTE_FMASK_INFO_OUTPUT
1288 *
1289 * @brief
1290 * Output structure for AddrComputeFmaskInfo
1291 ****************************************************************************************************
1292 */
1293 typedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT
1294 {
1295 UINT_32 size; ///< Size of this structure in bytes
1296
1297 UINT_32 pitch; ///< Pitch of fmask in pixels
1298 UINT_32 height; ///< Height of fmask in pixels
1299 UINT_32 numSlices; ///< Slices of fmask
1300 UINT_64 fmaskBytes; ///< Size of fmask in bytes
1301 UINT_32 baseAlign; ///< Base address alignment
1302 UINT_32 pitchAlign; ///< Pitch alignment
1303 UINT_32 heightAlign; ///< Height alignment
1304 UINT_32 bpp; ///< Bits per pixel of FMASK is: number of bit planes
1305 UINT_32 numSamples; ///< Number of samples, used for dump, export this since input
1306 /// may be changed in 9xx and above
1307 /// r800 and later HWL parameters
1308 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Fmask can have different
1309 /// bank_height from color buffer
1310 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1311 /// while the global useTileIndex is set to 1
1312 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1313 UINT_64 sliceSize; ///< Size of slice in bytes
1314 } ADDR_COMPUTE_FMASK_INFO_OUTPUT;
1315
1316 /**
1317 ****************************************************************************************************
1318 * AddrComputeFmaskInfo
1319 *
1320 * @brief
1321 * Compute Fmask pitch/height/depth/alignments and size in bytes
1322 ****************************************************************************************************
1323 */
1324 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo(
1325 ADDR_HANDLE hLib,
1326 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
1327 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
1328
1329
1330
1331 /**
1332 ****************************************************************************************************
1333 * ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1334 *
1335 * @brief
1336 * Input structure for AddrComputeFmaskAddrFromCoord
1337 ****************************************************************************************************
1338 */
1339 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1340 {
1341 UINT_32 size; ///< Size of this structure in bytes
1342
1343 UINT_32 x; ///< X coordinate
1344 UINT_32 y; ///< Y coordinate
1345 UINT_32 slice; ///< Slice index
1346 UINT_32 plane; ///< Plane number
1347 UINT_32 sample; ///< Sample index (fragment index for EQAA)
1348
1349 UINT_32 pitch; ///< Surface pitch, in pixels
1350 UINT_32 height; ///< Surface height, in pixels
1351 UINT_32 numSamples; ///< Number of samples
1352 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
1353 /// number of samples for normal AA; Set it to the
1354 /// number of fragments for EQAA
1355
1356 AddrTileMode tileMode; ///< Tile mode
1357 union
1358 {
1359 struct
1360 {
1361 UINT_32 bankSwizzle; ///< Bank swizzle
1362 UINT_32 pipeSwizzle; ///< Pipe swizzle
1363 };
1364 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
1365 };
1366
1367 /// r800 and later HWL parameters
1368 struct
1369 {
1370 UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by H/W clients
1371 UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored.
1372 UINT_32 reserved: 30; ///< Reserved for future use.
1373 };
1374 ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Client must provide all data
1375
1376 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
1377
1378 /**
1379 ****************************************************************************************************
1380 * ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1381 *
1382 * @brief
1383 * Output structure for AddrComputeFmaskAddrFromCoord
1384 ****************************************************************************************************
1385 */
1386 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1387 {
1388 UINT_32 size; ///< Size of this structure in bytes
1389
1390 UINT_64 addr; ///< Fmask address
1391 UINT_32 bitPosition; ///< Bit position within fmaskAddr, 0-7.
1392 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
1393
1394 /**
1395 ****************************************************************************************************
1396 * AddrComputeFmaskAddrFromCoord
1397 *
1398 * @brief
1399 * Compute Fmask address according to coordinates (x,y,slice,sample,plane)
1400 ****************************************************************************************************
1401 */
1402 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord(
1403 ADDR_HANDLE hLib,
1404 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
1405 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut);
1406
1407
1408
1409 /**
1410 ****************************************************************************************************
1411 * ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1412 *
1413 * @brief
1414 * Input structure for AddrComputeFmaskCoordFromAddr
1415 ****************************************************************************************************
1416 */
1417 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1418 {
1419 UINT_32 size; ///< Size of this structure in bytes
1420
1421 UINT_64 addr; ///< Address
1422 UINT_32 bitPosition; ///< Bit position within addr, 0-7.
1423
1424 UINT_32 pitch; ///< Pitch, in pixels
1425 UINT_32 height; ///< Height in pixels
1426 UINT_32 numSamples; ///< Number of samples
1427 UINT_32 numFrags; ///< Number of fragments
1428 AddrTileMode tileMode; ///< Tile mode
1429 union
1430 {
1431 struct
1432 {
1433 UINT_32 bankSwizzle; ///< Bank swizzle
1434 UINT_32 pipeSwizzle; ///< Pipe swizzle
1435 };
1436 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
1437 };
1438
1439 /// r800 and later HWL parameters
1440 struct
1441 {
1442 UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by HW components
1443 UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored.
1444 UINT_32 reserved: 30; ///< Reserved for future use.
1445 };
1446 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1447
1448 } ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT;
1449
1450 /**
1451 ****************************************************************************************************
1452 * ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1453 *
1454 * @brief
1455 * Output structure for AddrComputeFmaskCoordFromAddr
1456 ****************************************************************************************************
1457 */
1458 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1459 {
1460 UINT_32 size; ///< Size of this structure in bytes
1461
1462 UINT_32 x; ///< X coordinate
1463 UINT_32 y; ///< Y coordinate
1464 UINT_32 slice; ///< Slice index
1465 UINT_32 plane; ///< Plane number
1466 UINT_32 sample; ///< Sample index (fragment index for EQAA)
1467 } ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
1468
1469 /**
1470 ****************************************************************************************************
1471 * AddrComputeFmaskCoordFromAddr
1472 *
1473 * @brief
1474 * Compute FMASK coordinate from an given address
1475 ****************************************************************************************************
1476 */
1477 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
1478 ADDR_HANDLE hLib,
1479 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
1480 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut);
1481
1482
1483
1484 ////////////////////////////////////////////////////////////////////////////////////////////////////
1485 // Element/utility functions
1486 ////////////////////////////////////////////////////////////////////////////////////////////////////
1487
1488 /**
1489 ****************************************************************************************************
1490 * AddrGetVersion
1491 *
1492 * @brief
1493 * Get AddrLib version number
1494 ****************************************************************************************************
1495 */
1496 UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib);
1497
1498 /**
1499 ****************************************************************************************************
1500 * AddrUseTileIndex
1501 *
1502 * @brief
1503 * Return TRUE if tileIndex is enabled in this address library
1504 ****************************************************************************************************
1505 */
1506 BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib);
1507
1508 /**
1509 ****************************************************************************************************
1510 * AddrUseCombinedSwizzle
1511 *
1512 * @brief
1513 * Return TRUE if combined swizzle is enabled in this address library
1514 ****************************************************************************************************
1515 */
1516 BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib);
1517
1518 /**
1519 ****************************************************************************************************
1520 * ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1521 *
1522 * @brief
1523 * Input structure of AddrExtractBankPipeSwizzle
1524 ****************************************************************************************************
1525 */
1526 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1527 {
1528 UINT_32 size; ///< Size of this structure in bytes
1529
1530 UINT_32 base256b; ///< Base256b value
1531
1532 /// r800 and later HWL parameters
1533 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1534
1535 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1536 /// while the global useTileIndex is set to 1
1537 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1538 ///< README: When tileIndex is not -1, this must be valid
1539 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT;
1540
1541 /**
1542 ****************************************************************************************************
1543 * ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1544 *
1545 * @brief
1546 * Output structure of AddrExtractBankPipeSwizzle
1547 ****************************************************************************************************
1548 */
1549 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1550 {
1551 UINT_32 size; ///< Size of this structure in bytes
1552
1553 UINT_32 bankSwizzle; ///< Bank swizzle
1554 UINT_32 pipeSwizzle; ///< Pipe swizzle
1555 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT;
1556
1557 /**
1558 ****************************************************************************************************
1559 * AddrExtractBankPipeSwizzle
1560 *
1561 * @brief
1562 * Extract Bank and Pipe swizzle from base256b
1563 * @return
1564 * ADDR_OK if no error
1565 ****************************************************************************************************
1566 */
1567 ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle(
1568 ADDR_HANDLE hLib,
1569 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
1570 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut);
1571
1572
1573 /**
1574 ****************************************************************************************************
1575 * ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1576 *
1577 * @brief
1578 * Input structure of AddrCombineBankPipeSwizzle
1579 ****************************************************************************************************
1580 */
1581 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1582 {
1583 UINT_32 size; ///< Size of this structure in bytes
1584
1585 UINT_32 bankSwizzle; ///< Bank swizzle
1586 UINT_32 pipeSwizzle; ///< Pipe swizzle
1587 UINT_64 baseAddr; ///< Base address (leave it zero for driver clients)
1588
1589 /// r800 and later HWL parameters
1590 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1591
1592 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1593 /// while the global useTileIndex is set to 1
1594 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1595 ///< README: When tileIndex is not -1, this must be valid
1596 } ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT;
1597
1598 /**
1599 ****************************************************************************************************
1600 * ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1601 *
1602 * @brief
1603 * Output structure of AddrCombineBankPipeSwizzle
1604 ****************************************************************************************************
1605 */
1606 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1607 {
1608 UINT_32 size; ///< Size of this structure in bytes
1609
1610 UINT_32 tileSwizzle; ///< Combined swizzle
1611 } ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT;
1612
1613 /**
1614 ****************************************************************************************************
1615 * AddrCombineBankPipeSwizzle
1616 *
1617 * @brief
1618 * Combine Bank and Pipe swizzle
1619 * @return
1620 * ADDR_OK if no error
1621 * @note
1622 * baseAddr here is full MCAddress instead of base256b
1623 ****************************************************************************************************
1624 */
1625 ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle(
1626 ADDR_HANDLE hLib,
1627 const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
1628 ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut);
1629
1630
1631
1632 /**
1633 ****************************************************************************************************
1634 * ADDR_COMPUTE_SLICESWIZZLE_INPUT
1635 *
1636 * @brief
1637 * Input structure of AddrComputeSliceSwizzle
1638 ****************************************************************************************************
1639 */
1640 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT
1641 {
1642 UINT_32 size; ///< Size of this structure in bytes
1643
1644 AddrTileMode tileMode; ///< Tile Mode
1645 UINT_32 baseSwizzle; ///< Base tile swizzle
1646 UINT_32 slice; ///< Slice index
1647 UINT_64 baseAddr; ///< Base address, driver should leave it 0 in most cases
1648
1649 /// r800 and later HWL parameters
1650 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here!
1651
1652 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1653 /// while the global useTileIndex is set to 1
1654 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1655 ///< README: When tileIndex is not -1, this must be valid
1656 } ADDR_COMPUTE_SLICESWIZZLE_INPUT;
1657
1658
1659
1660 /**
1661 ****************************************************************************************************
1662 * ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1663 *
1664 * @brief
1665 * Output structure of AddrComputeSliceSwizzle
1666 ****************************************************************************************************
1667 */
1668 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1669 {
1670 UINT_32 size; ///< Size of this structure in bytes
1671
1672 UINT_32 tileSwizzle; ///< Recalculated tileSwizzle value
1673 } ADDR_COMPUTE_SLICESWIZZLE_OUTPUT;
1674
1675 /**
1676 ****************************************************************************************************
1677 * AddrComputeSliceSwizzle
1678 *
1679 * @brief
1680 * Extract Bank and Pipe swizzle from base256b
1681 * @return
1682 * ADDR_OK if no error
1683 ****************************************************************************************************
1684 */
1685 ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle(
1686 ADDR_HANDLE hLib,
1687 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
1688 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut);
1689
1690
1691 /**
1692 ****************************************************************************************************
1693 * AddrSwizzleGenOption
1694 *
1695 * @brief
1696 * Which swizzle generating options: legacy or linear
1697 ****************************************************************************************************
1698 */
1699 typedef enum _AddrSwizzleGenOption
1700 {
1701 ADDR_SWIZZLE_GEN_DEFAULT = 0, ///< As is in client driver implemention for swizzle
1702 ADDR_SWIZZLE_GEN_LINEAR = 1, ///< Using a linear increment of swizzle
1703 } AddrSwizzleGenOption;
1704
1705 /**
1706 ****************************************************************************************************
1707 * AddrSwizzleOption
1708 *
1709 * @brief
1710 * Controls how swizzle is generated
1711 ****************************************************************************************************
1712 */
1713 typedef union _ADDR_SWIZZLE_OPTION
1714 {
1715 struct
1716 {
1717 UINT_32 genOption : 1; ///< The way swizzle is generated, see AddrSwizzleGenOption
1718 UINT_32 reduceBankBit : 1; ///< TRUE if we need reduce swizzle bits
1719 UINT_32 reserved :30; ///< Reserved bits
1720 };
1721
1722 UINT_32 value;
1723
1724 } ADDR_SWIZZLE_OPTION;
1725
1726 /**
1727 ****************************************************************************************************
1728 * ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1729 *
1730 * @brief
1731 * Input structure of AddrComputeBaseSwizzle
1732 ****************************************************************************************************
1733 */
1734 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1735 {
1736 UINT_32 size; ///< Size of this structure in bytes
1737
1738 ADDR_SWIZZLE_OPTION option; ///< Swizzle option
1739 UINT_32 surfIndex; ///< Index of this surface type
1740 AddrTileMode tileMode; ///< Tile Mode
1741
1742 /// r800 and later HWL parameters
1743 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here!
1744
1745 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1746 /// while the global useTileIndex is set to 1
1747 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1748 ///< README: When tileIndex is not -1, this must be valid
1749 } ADDR_COMPUTE_BASE_SWIZZLE_INPUT;
1750
1751 /**
1752 ****************************************************************************************************
1753 * ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1754 *
1755 * @brief
1756 * Output structure of AddrComputeBaseSwizzle
1757 ****************************************************************************************************
1758 */
1759 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1760 {
1761 UINT_32 size; ///< Size of this structure in bytes
1762
1763 UINT_32 tileSwizzle; ///< Combined swizzle
1764 } ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT;
1765
1766 /**
1767 ****************************************************************************************************
1768 * AddrComputeBaseSwizzle
1769 *
1770 * @brief
1771 * Return a Combined Bank and Pipe swizzle base on surface based on surface type/index
1772 * @return
1773 * ADDR_OK if no error
1774 ****************************************************************************************************
1775 */
1776 ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle(
1777 ADDR_HANDLE hLib,
1778 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
1779 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut);
1780
1781
1782
1783 /**
1784 ****************************************************************************************************
1785 * ELEM_GETEXPORTNORM_INPUT
1786 *
1787 * @brief
1788 * Input structure for ElemGetExportNorm
1789 *
1790 ****************************************************************************************************
1791 */
1792 typedef struct _ELEM_GETEXPORTNORM_INPUT
1793 {
1794 UINT_32 size; ///< Size of this structure in bytes
1795
1796 AddrColorFormat format; ///< Color buffer format; Client should use ColorFormat
1797 AddrSurfaceNumber num; ///< Surface number type; Client should use NumberType
1798 AddrSurfaceSwap swap; ///< Surface swap byte swap; Client should use SurfaceSwap
1799 UINT_32 numSamples; ///< Number of samples
1800 } ELEM_GETEXPORTNORM_INPUT;
1801
1802 /**
1803 ****************************************************************************************************
1804 * ElemGetExportNorm
1805 *
1806 * @brief
1807 * Helper function to check one format can be EXPORT_NUM, which is a register
1808 * CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600
1809 * family
1810 * @note
1811 * The implementation is only for r600.
1812 * 00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two
1813 * clocks per export)
1814 * 01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one
1815 * clock per export)
1816 *
1817 ****************************************************************************************************
1818 */
1819 BOOL_32 ADDR_API ElemGetExportNorm(
1820 ADDR_HANDLE hLib,
1821 const ELEM_GETEXPORTNORM_INPUT* pIn);
1822
1823
1824
1825 /**
1826 ****************************************************************************************************
1827 * ELEM_FLT32TODEPTHPIXEL_INPUT
1828 *
1829 * @brief
1830 * Input structure for addrFlt32ToDepthPixel
1831 *
1832 ****************************************************************************************************
1833 */
1834 typedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT
1835 {
1836 UINT_32 size; ///< Size of this structure in bytes
1837
1838 AddrDepthFormat format; ///< Depth buffer format
1839 ADDR_FLT_32 comps[2]; ///< Component values (Z/stencil)
1840 } ELEM_FLT32TODEPTHPIXEL_INPUT;
1841
1842 /**
1843 ****************************************************************************************************
1844 * ELEM_FLT32TODEPTHPIXEL_INPUT
1845 *
1846 * @brief
1847 * Output structure for ElemFlt32ToDepthPixel
1848 *
1849 ****************************************************************************************************
1850 */
1851 typedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT
1852 {
1853 UINT_32 size; ///< Size of this structure in bytes
1854
1855 UINT_8* pPixel; ///< Real depth value. Same data type as depth buffer.
1856 /// Client must provide enough storage for this type.
1857 UINT_32 depthBase; ///< Tile base in bits for depth bits
1858 UINT_32 stencilBase; ///< Tile base in bits for stencil bits
1859 UINT_32 depthBits; ///< Bits for depth
1860 UINT_32 stencilBits; ///< Bits for stencil
1861 } ELEM_FLT32TODEPTHPIXEL_OUTPUT;
1862
1863 /**
1864 ****************************************************************************************************
1865 * ElemFlt32ToDepthPixel
1866 *
1867 * @brief
1868 * Convert a FLT_32 value to a depth/stencil pixel value
1869 *
1870 * @return
1871 * Return code
1872 *
1873 ****************************************************************************************************
1874 */
1875 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel(
1876 ADDR_HANDLE hLib,
1877 const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
1878 ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut);
1879
1880
1881
1882 /**
1883 ****************************************************************************************************
1884 * ELEM_FLT32TOCOLORPIXEL_INPUT
1885 *
1886 * @brief
1887 * Input structure for addrFlt32ToColorPixel
1888 *
1889 ****************************************************************************************************
1890 */
1891 typedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT
1892 {
1893 UINT_32 size; ///< Size of this structure in bytes
1894
1895 AddrColorFormat format; ///< Color buffer format
1896 AddrSurfaceNumber surfNum; ///< Surface number
1897 AddrSurfaceSwap surfSwap; ///< Surface swap
1898 ADDR_FLT_32 comps[4]; ///< Component values (r/g/b/a)
1899 } ELEM_FLT32TOCOLORPIXEL_INPUT;
1900
1901 /**
1902 ****************************************************************************************************
1903 * ELEM_FLT32TOCOLORPIXEL_INPUT
1904 *
1905 * @brief
1906 * Output structure for ElemFlt32ToColorPixel
1907 *
1908 ****************************************************************************************************
1909 */
1910 typedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT
1911 {
1912 UINT_32 size; ///< Size of this structure in bytes
1913
1914 UINT_8* pPixel; ///< Real color value. Same data type as color buffer.
1915 /// Client must provide enough storage for this type.
1916 } ELEM_FLT32TOCOLORPIXEL_OUTPUT;
1917
1918 /**
1919 ****************************************************************************************************
1920 * ElemFlt32ToColorPixel
1921 *
1922 * @brief
1923 * Convert a FLT_32 value to a red/green/blue/alpha pixel value
1924 *
1925 * @return
1926 * Return code
1927 *
1928 ****************************************************************************************************
1929 */
1930 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel(
1931 ADDR_HANDLE hLib,
1932 const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
1933 ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut);
1934
1935
1936 /**
1937 ****************************************************************************************************
1938 * ADDR_CONVERT_TILEINFOTOHW_INPUT
1939 *
1940 * @brief
1941 * Input structure for AddrConvertTileInfoToHW
1942 * @note
1943 * When reverse is TRUE, indices are igonred
1944 ****************************************************************************************************
1945 */
1946 typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT
1947 {
1948 UINT_32 size; ///< Size of this structure in bytes
1949 BOOL_32 reverse; ///< Convert control flag.
1950 /// FALSE: convert from real value to HW value;
1951 /// TRUE: convert from HW value to real value.
1952
1953 /// r800 and later HWL parameters
1954 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with real value
1955
1956 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1957 /// while the global useTileIndex is set to 1
1958 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1959 ///< README: When tileIndex is not -1, this must be valid
1960 UINT_32 bpp; ///< Bits per pixel
1961 } ADDR_CONVERT_TILEINFOTOHW_INPUT;
1962
1963 /**
1964 ****************************************************************************************************
1965 * ADDR_CONVERT_TILEINFOTOHW_OUTPUT
1966 *
1967 * @brief
1968 * Output structure for AddrConvertTileInfoToHW
1969 ****************************************************************************************************
1970 */
1971 typedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT
1972 {
1973 UINT_32 size; ///< Size of this structure in bytes
1974
1975 /// r800 and later HWL parameters
1976 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with hardware register value
1977
1978 } ADDR_CONVERT_TILEINFOTOHW_OUTPUT;
1979
1980 /**
1981 ****************************************************************************************************
1982 * AddrConvertTileInfoToHW
1983 *
1984 * @brief
1985 * Convert tile info from real value to hardware register value
1986 ****************************************************************************************************
1987 */
1988 ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW(
1989 ADDR_HANDLE hLib,
1990 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
1991 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut);
1992
1993
1994
1995 /**
1996 ****************************************************************************************************
1997 * ADDR_CONVERT_TILEINDEX_INPUT
1998 *
1999 * @brief
2000 * Input structure for AddrConvertTileIndex
2001 ****************************************************************************************************
2002 */
2003 typedef struct _ADDR_CONVERT_TILEINDEX_INPUT
2004 {
2005 UINT_32 size; ///< Size of this structure in bytes
2006
2007 INT_32 tileIndex; ///< Tile index
2008 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2009 UINT_32 bpp; ///< Bits per pixel
2010 BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual
2011 } ADDR_CONVERT_TILEINDEX_INPUT;
2012
2013 /**
2014 ****************************************************************************************************
2015 * ADDR_CONVERT_TILEINDEX_OUTPUT
2016 *
2017 * @brief
2018 * Output structure for AddrConvertTileIndex
2019 ****************************************************************************************************
2020 */
2021 typedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT
2022 {
2023 UINT_32 size; ///< Size of this structure in bytes
2024
2025 AddrTileMode tileMode; ///< Tile mode
2026 AddrTileType tileType; ///< Tile type
2027 ADDR_TILEINFO* pTileInfo; ///< Tile info
2028
2029 } ADDR_CONVERT_TILEINDEX_OUTPUT;
2030
2031 /**
2032 ****************************************************************************************************
2033 * AddrConvertTileIndex
2034 *
2035 * @brief
2036 * Convert tile index to tile mode/type/info
2037 ****************************************************************************************************
2038 */
2039 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex(
2040 ADDR_HANDLE hLib,
2041 const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
2042 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut);
2043
2044 /**
2045 ****************************************************************************************************
2046 * ADDR_GET_MACROMODEINDEX_INPUT
2047 *
2048 * @brief
2049 * Input structure for AddrGetMacroModeIndex
2050 ****************************************************************************************************
2051 */
2052 typedef struct _ADDR_GET_MACROMODEINDEX_INPUT
2053 {
2054 UINT_32 size; ///< Size of this structure in bytes
2055 ADDR_SURFACE_FLAGS flags; ///< Surface flag
2056 INT_32 tileIndex; ///< Tile index
2057 UINT_32 bpp; ///< Bits per pixel
2058 UINT_32 numFrags; ///< Number of color fragments
2059 } ADDR_GET_MACROMODEINDEX_INPUT;
2060
2061 /**
2062 ****************************************************************************************************
2063 * ADDR_GET_MACROMODEINDEX_OUTPUT
2064 *
2065 * @brief
2066 * Output structure for AddrGetMacroModeIndex
2067 ****************************************************************************************************
2068 */
2069 typedef struct _ADDR_GET_MACROMODEINDEX_OUTPUT
2070 {
2071 UINT_32 size; ///< Size of this structure in bytes
2072 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2073 } ADDR_GET_MACROMODEINDEX_OUTPUT;
2074
2075 /**
2076 ****************************************************************************************************
2077 * AddrGetMacroModeIndex
2078 *
2079 * @brief
2080 * Get macro mode index based on input parameters
2081 ****************************************************************************************************
2082 */
2083 ADDR_E_RETURNCODE ADDR_API AddrGetMacroModeIndex(
2084 ADDR_HANDLE hLib,
2085 const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
2086 ADDR_GET_MACROMODEINDEX_OUTPUT* pOut);
2087
2088 /**
2089 ****************************************************************************************************
2090 * ADDR_CONVERT_TILEINDEX1_INPUT
2091 *
2092 * @brief
2093 * Input structure for AddrConvertTileIndex1 (without macro mode index)
2094 ****************************************************************************************************
2095 */
2096 typedef struct _ADDR_CONVERT_TILEINDEX1_INPUT
2097 {
2098 UINT_32 size; ///< Size of this structure in bytes
2099
2100 INT_32 tileIndex; ///< Tile index
2101 UINT_32 bpp; ///< Bits per pixel
2102 UINT_32 numSamples; ///< Number of samples
2103 BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual
2104 } ADDR_CONVERT_TILEINDEX1_INPUT;
2105
2106 /**
2107 ****************************************************************************************************
2108 * AddrConvertTileIndex1
2109 *
2110 * @brief
2111 * Convert tile index to tile mode/type/info
2112 ****************************************************************************************************
2113 */
2114 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1(
2115 ADDR_HANDLE hLib,
2116 const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
2117 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut);
2118
2119
2120
2121 /**
2122 ****************************************************************************************************
2123 * ADDR_GET_TILEINDEX_INPUT
2124 *
2125 * @brief
2126 * Input structure for AddrGetTileIndex
2127 ****************************************************************************************************
2128 */
2129 typedef struct _ADDR_GET_TILEINDEX_INPUT
2130 {
2131 UINT_32 size; ///< Size of this structure in bytes
2132
2133 AddrTileMode tileMode; ///< Tile mode
2134 AddrTileType tileType; ///< Tile-type: disp/non-disp/...
2135 ADDR_TILEINFO* pTileInfo; ///< Pointer to tile-info structure, can be NULL for linear/1D
2136 } ADDR_GET_TILEINDEX_INPUT;
2137
2138 /**
2139 ****************************************************************************************************
2140 * ADDR_GET_TILEINDEX_OUTPUT
2141 *
2142 * @brief
2143 * Output structure for AddrGetTileIndex
2144 ****************************************************************************************************
2145 */
2146 typedef struct _ADDR_GET_TILEINDEX_OUTPUT
2147 {
2148 UINT_32 size; ///< Size of this structure in bytes
2149
2150 INT_32 index; ///< index in table
2151 } ADDR_GET_TILEINDEX_OUTPUT;
2152
2153 /**
2154 ****************************************************************************************************
2155 * AddrGetTileIndex
2156 *
2157 * @brief
2158 * Get the tiling mode index in table
2159 ****************************************************************************************************
2160 */
2161 ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex(
2162 ADDR_HANDLE hLib,
2163 const ADDR_GET_TILEINDEX_INPUT* pIn,
2164 ADDR_GET_TILEINDEX_OUTPUT* pOut);
2165
2166
2167
2168
2169 /**
2170 ****************************************************************************************************
2171 * ADDR_PRT_INFO_INPUT
2172 *
2173 * @brief
2174 * Input structure for AddrComputePrtInfo
2175 ****************************************************************************************************
2176 */
2177 typedef struct _ADDR_PRT_INFO_INPUT
2178 {
2179 AddrFormat format; ///< Surface format
2180 UINT_32 baseMipWidth; ///< Base mipmap width
2181 UINT_32 baseMipHeight; ///< Base mipmap height
2182 UINT_32 baseMipDepth; ///< Base mipmap depth
2183 UINT_32 numFrags; ///< Number of fragments,
2184 } ADDR_PRT_INFO_INPUT;
2185
2186 /**
2187 ****************************************************************************************************
2188 * ADDR_PRT_INFO_OUTPUT
2189 *
2190 * @brief
2191 * Input structure for AddrComputePrtInfo
2192 ****************************************************************************************************
2193 */
2194 typedef struct _ADDR_PRT_INFO_OUTPUT
2195 {
2196 UINT_32 prtTileWidth;
2197 UINT_32 prtTileHeight;
2198 } ADDR_PRT_INFO_OUTPUT;
2199
2200 /**
2201 ****************************************************************************************************
2202 * AddrComputePrtInfo
2203 *
2204 * @brief
2205 * Compute prt surface related information
2206 ****************************************************************************************************
2207 */
2208 ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
2209 ADDR_HANDLE hLib,
2210 const ADDR_PRT_INFO_INPUT* pIn,
2211 ADDR_PRT_INFO_OUTPUT* pOut);
2212
2213 ////////////////////////////////////////////////////////////////////////////////////////////////////
2214 // DCC key functions
2215 ////////////////////////////////////////////////////////////////////////////////////////////////////
2216
2217 /**
2218 ****************************************************************************************************
2219 * _ADDR_COMPUTE_DCCINFO_INPUT
2220 *
2221 * @brief
2222 * Input structure of AddrComputeDccInfo
2223 ****************************************************************************************************
2224 */
2225 typedef struct _ADDR_COMPUTE_DCCINFO_INPUT
2226 {
2227 UINT_32 size; ///< Size of this structure in bytes
2228 UINT_32 bpp; ///< BitPP of color surface
2229 UINT_32 numSamples; ///< Sample number of color surface
2230 UINT_64 colorSurfSize; ///< Size of color surface to which dcc key is bound
2231 AddrTileMode tileMode; ///< Tile mode of color surface
2232 ADDR_TILEINFO tileInfo; ///< Tile info of color surface
2233 UINT_32 tileSwizzle; ///< Tile swizzle
2234 INT_32 tileIndex; ///< Tile index of color surface,
2235 ///< MUST be -1 if you don't want to use it
2236 ///< while the global useTileIndex is set to 1
2237 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2238 ///< README: When tileIndex is not -1, this must be valid
2239 } ADDR_COMPUTE_DCCINFO_INPUT;
2240
2241 /**
2242 ****************************************************************************************************
2243 * ADDR_COMPUTE_DCCINFO_OUTPUT
2244 *
2245 * @brief
2246 * Output structure of AddrComputeDccInfo
2247 ****************************************************************************************************
2248 */
2249 typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT
2250 {
2251 UINT_32 size; ///< Size of this structure in bytes
2252 UINT_64 dccRamBaseAlign; ///< Base alignment of dcc key
2253 UINT_64 dccRamSize; ///< Size of dcc key
2254 UINT_64 dccFastClearSize; ///< Size of dcc key portion that can be fast cleared
2255 BOOL_32 subLvlCompressible; ///< Whether sub resource is compressiable
2256 BOOL_32 dccRamSizeAligned; ///< Whether the dcc key size is aligned
2257 } ADDR_COMPUTE_DCCINFO_OUTPUT;
2258
2259 /**
2260 ****************************************************************************************************
2261 * AddrComputeDccInfo
2262 *
2263 * @brief
2264 * Compute DCC key size, base alignment
2265 * info
2266 ****************************************************************************************************
2267 */
2268 ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
2269 ADDR_HANDLE hLib,
2270 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
2271 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut);
2272
2273 /**
2274 ****************************************************************************************************
2275 * ADDR_GET_MAX_ALINGMENTS_OUTPUT
2276 *
2277 * @brief
2278 * Output structure of AddrGetMaxAlignments
2279 ****************************************************************************************************
2280 */
2281 typedef struct _ADDR_GET_MAX_ALINGMENTS_OUTPUT
2282 {
2283 UINT_32 size; ///< Size of this structure in bytes
2284 UINT_64 baseAlign; ///< Maximum base alignment in bytes
2285 } ADDR_GET_MAX_ALINGMENTS_OUTPUT;
2286
2287 /**
2288 ****************************************************************************************************
2289 * AddrGetMaxAlignments
2290 *
2291 * @brief
2292 * Gets maximnum alignments
2293 ****************************************************************************************************
2294 */
2295 ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
2296 ADDR_HANDLE hLib,
2297 ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut);
2298
2299 #if defined(__cplusplus)
2300 }
2301 #endif
2302
2303 #endif // __ADDR_INTERFACE_H__
2304
2305